I don't think zIIP is usually purchased for performance enhancement. The primary advantage of zIIP is that--whatever it's called upon to do--its MSUs do not bump up software license costs. Furthermore, zIIP always runs at the full model speed, even on an otherwise kneecapped box. Whether this results in overall performance improvement depends on the workload mix.
On one of our small boxes for example, a z196 401 with CBU for DR, zIIP gets invoked for SDM (XRC). That's a pretty specialized configuration that probably applies to very few shops. We have another small box that may or may not get much of a boost from its zIIP. Again, workload mix is everything. . . . J.O.Skip Robinson Southern California Edison Company Electric Dragon Team Paddler SHARE MVS Program Co-Manager 323-715-0595 Mobile 626-302-7535 Office [email protected] -----Original Message----- From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf Of Clark Morris Sent: Sunday, July 17, 2016 2:33 PM To: [email protected] Subject: (External):Changing CPU mix was Re: Any Gotchas going from V1.13 to V2.2 [Default] On 15 Jul 2016 18:51:42 -0700, in bit.listserv.ibm-main [email protected] (Jesse 1 Robinson) wrote: >In our upgrades over many years, our goal has generally been to keep MSUs more >or less the same unless actual growth is necessary. Few if any >vendors/products base price on number of CPs. Our upgrades are usually based >on technology--and the accompanying IBM price advantage. Because CPs have >gotten hugely faster since the advent of CMOS in the mid-90s, this has often >meant a reduction in the number of GP CPs from one generation to the next. > To sum up my question, would 2 general purpose CPUs each kneecapped to X MIPS plus a zIIP perform better than 3 general purpose CPUs each kneecapped to X MIPS and no zIIP? What are the workload characteristics that would influence the choice? What are the financial characteristics (software and hardware costs) that would influence the choice? Clark Morris >. >. >. >J.O.Skip Robinson >Southern California Edison Company >Electric Dragon Team Paddler >SHARE MVS Program Co-Manager >323-715-0595 Mobile >626-302-7535 Office >[email protected] > >-----Original Message----- >From: IBM Mainframe Discussion List [mailto:[email protected]] >On Behalf Of Clark Morris >Sent: Friday, July 15, 2016 5:11 PM >To: [email protected] >Subject: (External):Re: Any Gotchas going from V1.13 to V2.2 > >[Default] On 15 Jul 2016 04:46:21 -0700, in bit.listserv.ibm-main >[email protected] (Tom Marchant) wrote: > >>On Thu, 14 Jul 2016 18:29:38 -0300, Clark Morris wrote: >> >>>[Default] On 14 Jul 2016 10:41:38 -0700, in bit.listserv.ibm-main >>>[email protected] (Ed Jaffe) wrote: >>> >> >>>>What you don't know is that Dave is running a kneecapped 3-way with >>>>no zIIP where each CP delivers ~9 MSU. >>>> >>>>We run a kneecapped 3-way similar to Dave's, but we have a zIIP that >>>>delivers ~178MSU. It's 19 times faster than any of Dave's CPs and, >>>>in my experience, one needs that kind of power to get decent >>>>response times out of any significant Java workload. >>> >>>Would it make sense to make it a kneecapped 2 way with a zIIP? Are >>>there areas where this would improve performance? >> >>Are you assuming that in order to get a zIIP he'd have to give up a CP? >>That isn't the case. There are available processors on the box to turn >>in a zIIP. > >My thought in suggesting a 2-way plus a zIIP was to keep the total number of >processors the same . I was also thinking of a scenario where each of the two >remaining processors kept their original setting so the total z capacity would >be 2/3 of the original configuration plus the capacity of the zIIP. > >Clark Morris ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
