Yes you are interpreting it correctly.

It is reported on the POST.  During POST processing, the RB pointer is used to 
identify what RB/TCB issued the WAIT.  It can be a storage overlay or the 
POSTer is not pointing at an ECB at all but some other piece of storage with 
the 'wait' bit turned on.

It would be difficult to identify the WAITer if it wasn't an ECB being posted.

Verify the ECBLIST has the correct addresses and the POSTer is posting one of 
them.  What is the value of the ECB storage at the time of abend?

...chris.

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of Charles Mills
Sent: September-28-16 5:17 PM
To: [email protected]
Subject: Interpreting an S202-0000

A program issues a WAIT ECBLIST= for a list of three ECBs. The program receives 
an S202-0000 ABEND. Here is the explanation:

Explanation: During processing of a POST macro, the system found an error with 
an event control block (ECB).

00 The system found an incorrect address for a request block (RB) in the 3 
low-order bytes of the ECB specified by the problem program.
The system places the address of the RB in the ECB during processing of a WAIT 
macro. This address must remain in the ECB until a POST macro places a post 
code or zeros in the ECB.

Am I interpreting this correctly as indicating that the ECB was modified 
incorrectly *after* the WAIT ECBLIST= and *before* the completion of a POST?
In other words, the WAIT ECBLIST= ran correctly through the initial processing 
of the function but during the processing of POST, the contents of bits 8-31 of 
the ECB were found not to point to a valid RB. 

Is there any particular reason this is reported on the WAIT rather than on the 
POST?

Charles 

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