>The program receives an S202-0000 ABEND. Did you consider the possibility that the ECB storage might not have been initialized to 0's prior to the wait (and prior to the potential post)? And perhaps the post happened before the wait. Imagine if the ECB storage is initialized by "dirty getmain" to x'80808080'. This will appear to POST as "waiting" but will not have a valid RB address and may result in a 202 abend.
>It is definitely, unquestionably being reported on the WAIT, not the POST. Wanna bet? >An interesting question would be "if the ECB has an invalid RB address, >how did POST know what task to ABEND?" Not so interesting. POST doesn't abend the task identified by the ECB's RB, it abends the issuer of POST (whether that be a task or SRB). Peter Relson z/OS Core Technology Design Peter [email protected] 1-845-435-8390 8+295-8390 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
