I presume the target of Ed's STOSM is in the PSW he's fixing to load. So, after changing the code to use the STNSM, he'd need to add an OI PSWMASK,X'03' before the LPSW, as it really sounds like he doesn't want to run disabled after that.
Right? On Fri, Dec 16, 2016 at 9:27 PM, Jim Mulder <[email protected]> wrote: > > > And that means that PSW and your code need to be in fixed or DREF > storage. > > > > Not arguing at all, just trying to educate myself ... why? I don't see > > anything in PoOp about STNSM needing fixed storage. > > PoOp doesn't know anything fixed storage. And it isn't the > STNSM that needs the storage to be fixed, in this case. At the > completion of that STNSM with a mask of x'FC', we will be > disabled for I/O and external interruptions, which is what we need > in order to ensure that we don't lose an update to the PSW PER bit. > If the LPSW instruction or the target PSW is not in fixed or DREF > storage, the LPSW instruction or the PSW operand page could get get > invalidated by RSM running on another CPU, and then, since, > the LPSW instruction is executed while disabled, the resulting > access exception would get turned into a 0C4 abend. > > Jim Mulder z/OS Diagnosis, Design, Development, Test IBM Corp. > Poughkeepsie NY > > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > -- sas ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
