>From memory, the PL/I compiler option 'LIST' should produce an assembler listing and show 2 CLC's when using nested if's (else only 1 CLC). I doubt that optimising the compiler could improve this, because the generated machine code would(logically) stillhave to process the 2 nested if's.
On 04/08/2017 03:45, Edward Finnell wrote: > It's been too long, would compiler OPT(2) make it better? > > > In a message dated 8/3/2017 9:14:44 P.M. Central Daylight Time, > [email protected] writes: > > It is the unnecessary nested'if' that would degrade performance > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > . > ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
