On Thu, 31 May 2018 17:05:56 -0400, Thomas David Rivers wrote: > >And - why would register 14 be so carefully carved-out? Seems like the >SVC 144 >could "return" without requiring R14, perhaps via some LOADPSW or similar >approach within the bowels of the OS... > How about just B address(0,0) instruction constructed in temp storage instead of BR. (And gotta set AMODE and program mask, etc.)
Hmmm. Can one rely on content of program mask (especially ILC) aftr a breakpoint? -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
