Avoid processor-specific optimizations; what is millicode on one box may not be on another. Worry first about getting your code correct and maintainable.
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of Christopher Y. Blaicher <cblaic...@syncsort.com> Sent: Monday, August 12, 2019 9:32 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Instruction speeds There is no instruction cycle time table. There are some general guidelines you can follow. Don't overload cache. Locality of reference for instructions and data is important. The machine will do out-of-order instruction processing, but there are limits. If you load a register don't use it as a base register in the next instruction, if you can help it. MVC is a lot faster than MVCL. A series of MVC's will beat a MVCL up to about 32K. JUMPs are faster than BRANCHes. Don’t use instructions that set the condition code, unless you need it. Millicode instructions have startup and shutdown overheads. Many times you can go faster using open code to do what a millicode instruction does. Here is one that has nothing to do with an instruction - Don't assign CPs from different drawers to an LPAR, that includes ZIIPs. Task switching across drawers kills cache and kills performance. You will lose hundreds, if not thousands, of cycles. There are some articles on the net that go over processor design and cache design. The processor designs will give you a hint to the number of stages an instruction goes through. Pipeline delays are what you try to avoid. Chris Blaicher Technical Architect Syncsort, Inc. -----Original Message----- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Brian Chapman Sent: Monday, August 12, 2019 8:48 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Instruction speeds Hi everyone, I did some searching, but I didn't find anything that really discussed this on the topic that I'm interested. Is there anything published that compares the cycle times of the most used instructions? For example; moving an address between areas of storage. I would assume that executing a LOAD and STORE would be much quicker than executing a MVC. Or executing a LOAD ADDRESS to increment a register instead of ADD HALF WORD. Or does this really matter as much as ordering the instructions so they are optimized for the pipeline? ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN