An SVC can schedule an SRB into another address space; that may be more 
overhead, but it's still space switching. But, yes, there are far fewer use 
cases for new VCs these days.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


________________________________________
From: IBM Mainframe Discussion List <[email protected]> on behalf of 
Christopher Y. Blaicher <[email protected]>
Sent: Wednesday, August 28, 2019 12:48 PM
To: [email protected]
Subject: Re: Assembler :- PC Instruction

Never measured SVC vs PC.  While in some cases PC and SVC are similar, in many 
ways PC is far superior to SVC.  It can be local or globally defined and it can 
be dynamically defined and removed.  (OK, so can an SVC be added and deleted, 
but I think PC's are easier).
Also, an SVC can't do space switching.

Chris Blaicher
Technical Architect
Syncsort, Inc.


-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of Seymour J Metz
Sent: Wednesday, August 28, 2019 12:23 PM
To: [email protected]
Subject: Re: Assembler :- PC Instruction

I doubt that PC was ever intended as a replacement for, e.g., BASR. How does 
its performance stack up against SVC?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


________________________________________
From: IBM Mainframe Discussion List <[email protected]> on behalf of 
Christopher Y. Blaicher <[email protected]>
Sent: Wednesday, August 28, 2019 12:19 PM
To: [email protected]
Subject: Re: Assembler :- PC Instruction

PC and BAKR, which is another stacking type instruction, are not cheap.  You 
can do a BASR and STORAGE OBTAIN, STORAGE RELEASE and BR in less time than a 
BAKR.  I do not know for sure, but I would guess that 99% of what PC, BAKR and 
PR do is millicode, and they do a lot.

Chris Blaicher
Technical Architect
Syncsort, Inc.

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of scott Ford
Sent: Wednesday, August 28, 2019 11:21 AM
To: [email protected]
Subject: Re: Assembler :- PC Instruction

I feel it's important how to use the instruction and it's pros and cons.
I am not sure how important speed of instructions or width , halfword or full 
word are that pressing of an issue with today's processors, but that's my 
opinion.

Scott

On Wed, Aug 28, 2019 at 11:18 AM scott Ford <[email protected]> wrote:

> Charles,
>
> Exactly, what is being done under the covers, i.e;  microcode etc ..
>
> Scott
>
> On Wed, Aug 28, 2019 at 10:49 AM Tony Harminc <[email protected]> wrote:
>
>> On Wed, 28 Aug 2019 at 09:59, Charles Mills <[email protected]> wrote:
>>
>> > In answer to your question, I guess the answer is no. There is a
>> > DAT
>> "facility" (some of us remember when there was a DAT box!) but no,
>> there is no named "PC facility" any more than there is a "BAL
>> facility." It's just part of the processors.
>>
>> It's arguable that ASN translation is (usually) the part of the
>> architecture that corresponds best to DAT in the context of PC and PR
>> instruction processing. But not all PCs invoke ASN translation, and
>> those that do do it a bit differently than how it is described in
>> Chapter 3.
>>
>> But really, as Binyamin said, the excruciating details of what PC
>> *does* are covered in the POPS, both under the PC instruction itself,
>> and in Chapter 5 in the section "Stacking Process" under "Linkage
>> Stack Operations".
>>
>> Tony H.
>>
>> ---------------------------------------------------------------------
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>> IBM-MAIN
>>
> --
> Scott Ford
> IDMWORKS
> z/OS Development
>
--
Scott Ford
IDMWORKS
z/OS Development

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