John Ahlstrom <[EMAIL PROTECTED]> writes: > Lynn: > > Can you point us to any information on 138/148 microprogramming and > microarchitecture? Examples of the 10:1 microcode to 370 instruction > expansion would be fascinating.
re: http://www.garlic.com/~lynn/2006n.html#44 Any resources on VLIW? i don't have any left ... and am not aware of any online resources. possibly somebody has some old field engineering manuals with instruction description. the high-end 370s had horizontal microcode ... more akin to VLIW. the low and mid-range 370s tended to be relatively straightforward processor enginess ... and the 370 "microcode" was relatively straight-foward sequential instruction sequences (i.e. "vertical" microcode) ... and the avg. of 10:1 microcode instruction per 370 instructions was relatively the same across variety of engines (i.e. the microprocessor MIP rate had to be on the order of ten times that of whatever 370 model it was being used in). the large variety of these different (microcode) processing engines gave rise to the "fort knox" effort circa 1980 ... to replace most of the internal microcode processing engines with 801s (aka risc). http://www.garlic.com/~lynn/subtopic.html#801 where the standard 801/risc instruction set was extended with some instructions that aided in instruction simulation. the followon to the 138/148 was the 4331/4341. the follow-on to the 4331/4341 (4361/4381) were going to have 801 risc processors as the microcode engine. i help author a white paper that killed that effort. the issue was that technology was advancing to the point where it was possible to implement nearly the whole 370 directly in silicon ... avoiding much of the instruction emulation overhead altogether (i.e. 4381 was much more of a direct silicon implementation). some number of the 370 instructions required a lot more then 10 microprocessor instructions and for which there wouldn't be a direct simple microcode instruction ... however, the typical high useage 370 kernel instructions tended to be a lot of testing bits/state and branching ... for which there typically was an exact correspondance in the microcode instruction set (i.e. eliminate microcode decode of the 370 instruction, manipulate the 370 registers, etc)
