On ke, 2017-08-09 at 13:07 -0700, Rodrigo Vivi wrote:
> A missing part to EU slice power gating is the
> debugfs interface. This patch actually should have been
> squashed to the initial EU slice power gating one.
> v2: Initial patch was merged without this part.
> Fixes: c7ae7e9ab207 ("drm/i915/cnl: Configure EU slice power gating.")
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>

Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>

Regards, Joonas
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
Intel-gfx mailing list

Reply via email to