On Wed, Feb 14, 2018 at 01:37:22PM +0000, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-02-14 13:33:03) > > On Tue, Feb 13, 2018 at 04:29:17PM -0800, José Roberto de Souza wrote: > > > data_reg was not being used but it can be used to reduce the number of > > > calls to hsw_dip_data_reg() and just increment the reg by the size of > > > uint32. > > > > > > Signed-off-by: José Roberto de Souza <jose.so...@intel.com> > > > --- > > > drivers/gpu/drm/i915/intel_hdmi.c | 12 ++++-------- > > > 1 file changed, 4 insertions(+), 8 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c > > > b/drivers/gpu/drm/i915/intel_hdmi.c > > > index f5d7bfb43006..ef258eac8ae8 100644 > > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > > @@ -393,15 +393,11 @@ static void hsw_write_infoframe(struct drm_encoder > > > *encoder, > > > I915_WRITE(ctl_reg, val); > > > > > > mmiowb(); > > mmiowb() is just a compiler barrier on x86, and meaningless wrt to our > uncached mmio. If you need a full mmio barrier, use POSTING_READ().
Yeah, someone should nuke all the mmiowb()s from the infoframe code. I still don't understand what they were supposed to achieve. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intelfirstname.lastname@example.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx