The majority of runtime-pm operations are bounded and scoped within a
function; these are easy to verify that the wakeref are handled
correctly. We can employ the compiler to help us, and reduce the number
of wakerefs tracked when debugging, by passing around cookies provided
by the various rpm_get functions to their rpm_put counterpart. This
makes the pairing explicit, and given the required wakeref cookie the
compiler can verify that we pass an initialised value to the rpm_put
(quite handy for double checking error paths).

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c     | 35 +++++++------
 drivers/gpu/drm/i915/i915_drv.c         |  5 +-
 drivers/gpu/drm/i915/i915_drv.h         |  2 +
 drivers/gpu/drm/i915/i915_gem.c         |  4 +-
 drivers/gpu/drm/i915/intel_audio.c      |  3 +-
 drivers/gpu/drm/i915/intel_cdclk.c      | 10 ++--
 drivers/gpu/drm/i915/intel_crt.c        | 25 +++++----
 drivers/gpu/drm/i915/intel_csr.c        | 17 ++++--
 drivers/gpu/drm/i915/intel_ddi.c        | 36 ++++++++-----
 drivers/gpu/drm/i915/intel_display.c    | 61 ++++++++++++++--------
 drivers/gpu/drm/i915/intel_dp.c         | 29 ++++++-----
 drivers/gpu/drm/i915/intel_dpll_mgr.c   | 66 +++++++++++++++--------
 drivers/gpu/drm/i915/intel_drv.h        | 17 ++++--
 drivers/gpu/drm/i915/intel_hdmi.c       | 20 ++++---
 drivers/gpu/drm/i915/intel_i2c.c        | 20 +++----
 drivers/gpu/drm/i915/intel_lvds.c       |  8 +--
 drivers/gpu/drm/i915/intel_pipe_crc.c   |  6 ++-
 drivers/gpu/drm/i915/intel_pm.c         |  7 ++-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 69 ++++++++++++++++---------
 drivers/gpu/drm/i915/intel_sprite.c     | 24 ++++++---
 drivers/gpu/drm/i915/vlv_dsi.c          |  8 +--
 21 files changed, 303 insertions(+), 169 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 529bdca2fd25..06e49a423599 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -656,10 +656,12 @@ static void gen8_display_interrupt_info(struct seq_file 
*m)
 
        for_each_pipe(dev_priv, pipe) {
                enum intel_display_power_domain power_domain;
+               intel_wakeref_t wakeref;
 
                power_domain = POWER_DOMAIN_PIPE(pipe);
-               if (!intel_display_power_get_if_enabled(dev_priv,
-                                                       power_domain)) {
+               wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                       power_domain);
+               if (!wakeref) {
                        seq_printf(m, "Pipe %c power disabled\n",
                                   pipe_name(pipe));
                        continue;
@@ -674,7 +676,7 @@ static void gen8_display_interrupt_info(struct seq_file *m)
                           pipe_name(pipe),
                           I915_READ(GEN8_DE_PIPE_IER(pipe)));
 
-               intel_display_power_put(dev_priv, power_domain);
+               intel_display_power_put(dev_priv, power_domain, wakeref);
        }
 
        seq_printf(m, "Display Engine port interrupt mask:\t%08x\n",
@@ -710,6 +712,8 @@ static int i915_interrupt_info(struct seq_file *m, void 
*data)
        wakeref = intel_runtime_pm_get(dev_priv);
 
        if (IS_CHERRYVIEW(dev_priv)) {
+               intel_wakeref_t pref;
+
                seq_printf(m, "Master Interrupt Control:\t%08x\n",
                           I915_READ(GEN8_MASTER_IRQ));
 
@@ -725,8 +729,9 @@ static int i915_interrupt_info(struct seq_file *m, void 
*data)
                        enum intel_display_power_domain power_domain;
 
                        power_domain = POWER_DOMAIN_PIPE(pipe);
-                       if (!intel_display_power_get_if_enabled(dev_priv,
-                                                               power_domain)) {
+                       pref = intel_display_power_get_if_enabled(dev_priv,
+                                                                 power_domain);
+                       if (!pref) {
                                seq_printf(m, "Pipe %c power disabled\n",
                                           pipe_name(pipe));
                                continue;
@@ -736,17 +741,17 @@ static int i915_interrupt_info(struct seq_file *m, void 
*data)
                                   pipe_name(pipe),
                                   I915_READ(PIPESTAT(pipe)));
 
-                       intel_display_power_put(dev_priv, power_domain);
+                       intel_display_power_put(dev_priv, power_domain, pref);
                }
 
-               intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+               pref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
                seq_printf(m, "Port hotplug:\t%08x\n",
                           I915_READ(PORT_HOTPLUG_EN));
                seq_printf(m, "DPFLIPSTAT:\t%08x\n",
                           I915_READ(VLV_DPFLIPSTAT));
                seq_printf(m, "DPINVGTT:\t%08x\n",
                           I915_READ(DPINVGTT));
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, pref);
 
                for (i = 0; i < 4; i++) {
                        seq_printf(m, "GT Interrupt IMR %d:\t%08x\n",
@@ -809,10 +814,12 @@ static int i915_interrupt_info(struct seq_file *m, void 
*data)
                           I915_READ(VLV_IMR));
                for_each_pipe(dev_priv, pipe) {
                        enum intel_display_power_domain power_domain;
+                       intel_wakeref_t pref;
 
                        power_domain = POWER_DOMAIN_PIPE(pipe);
-                       if (!intel_display_power_get_if_enabled(dev_priv,
-                                                               power_domain)) {
+                       pref = intel_display_power_get_if_enabled(dev_priv,
+                                                                 power_domain);
+                       if (!pref) {
                                seq_printf(m, "Pipe %c power disabled\n",
                                           pipe_name(pipe));
                                continue;
@@ -821,7 +828,7 @@ static int i915_interrupt_info(struct seq_file *m, void 
*data)
                        seq_printf(m, "Pipe %c stat:\t%08x\n",
                                   pipe_name(pipe),
                                   I915_READ(PIPESTAT(pipe)));
-                       intel_display_power_put(dev_priv, power_domain);
+                       intel_display_power_put(dev_priv, power_domain, pref);
                }
 
                seq_printf(m, "Master IER:\t%08x\n",
@@ -1757,8 +1764,7 @@ static int i915_sr_status(struct seq_file *m, void 
*unused)
        intel_wakeref_t wakeref;
        bool sr_enabled = false;
 
-       wakeref = intel_runtime_pm_get(dev_priv);
-       intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 
        if (INTEL_GEN(dev_priv) >= 9)
                /* no global SR status; inspect per-plane WM */;
@@ -1774,8 +1780,7 @@ static int i915_sr_status(struct seq_file *m, void 
*unused)
        else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
                sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
-       intel_runtime_pm_put(dev_priv, wakeref);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
 
        seq_printf(m, "self-refresh: %s\n", enableddisabled(sr_enabled));
 
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index bbb6be128d47..2b85014d4a49 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1446,13 +1446,14 @@ void i915_driver_unload(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
        struct pci_dev *pdev = dev_priv->drm.pdev;
+       intel_wakeref_t wakeref;
 
        i915_driver_unregister(dev_priv);
 
        if (i915_gem_suspend(dev_priv))
                DRM_ERROR("failed to idle hardware; continuing to unload!\n");
 
-       intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 
        drm_atomic_helper_shutdown(dev);
 
@@ -1479,7 +1480,7 @@ void i915_driver_unload(struct drm_device *dev)
        i915_driver_cleanup_hw(dev_priv);
        i915_driver_cleanup_mmio(dev_priv);
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
 
        intel_runtime_pm_cleanup(dev_priv);
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9ce52d60d866..f5454b8369d7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -475,6 +475,7 @@ struct intel_csr {
        uint32_t mmiodata[8];
        uint32_t dc_state;
        uint32_t allowed_dc_mask;
+       intel_wakeref_t wakeref;
 };
 
 enum i915_cache_level {
@@ -2108,6 +2109,7 @@ struct drm_i915_private {
                 * is a slight delay before we do so.
                 */
                intel_wakeref_t awake;
+               intel_wakeref_t power;
 
                /**
                 * The number of times we have woken up.
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 46367470f42d..8d021d45b5fd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -177,7 +177,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915)
        if (INTEL_GEN(i915) >= 6)
                gen6_rps_idle(i915);
 
-       intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ);
+       intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ, i915->gt.power);
 
        intel_runtime_pm_put(i915, wakeref);
 
@@ -222,7 +222,7 @@ void i915_gem_unpark(struct drm_i915_private *i915)
         * Work around it by grabbing a GT IRQ power domain whilst there is any
         * GT activity, preventing any DC state transitions.
         */
-       intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
+       i915->gt.power = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
 
        if (unlikely(++i915->gt.epoch == 0)) /* keep 0 as invalid */
                i915->gt.epoch = 1;
diff --git a/drivers/gpu/drm/i915/intel_audio.c 
b/drivers/gpu/drm/i915/intel_audio.c
index b725835b47ef..bd51ce5c7d9f 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -732,7 +732,8 @@ static void i915_audio_component_get_power(struct device 
*kdev)
 
 static void i915_audio_component_put_power(struct device *kdev)
 {
-       intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
+       intel_display_power_put_unchecked(kdev_to_i915(kdev),
+                                         POWER_DOMAIN_AUDIO);
 }
 
 static void i915_audio_component_codec_wake_override(struct device *kdev,
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
b/drivers/gpu/drm/i915/intel_cdclk.c
index 29075c763428..01f0f7913f86 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -520,6 +520,7 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
 {
        int cdclk = cdclk_state->cdclk;
        u32 val, cmd = cdclk_state->voltage_level;
+       intel_wakeref_t wakeref;
 
        switch (cdclk) {
        case 400000:
@@ -539,7 +540,7 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
         * a system suspend.  So grab the PIPE-A domain, which covers
         * the HW blocks needed for the following programming.
         */
-       intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
 
        mutex_lock(&dev_priv->pcu_lock);
        val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
@@ -593,7 +594,7 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
 
        vlv_program_pfi_credits(dev_priv);
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A, wakeref);
 }
 
 static void chv_set_cdclk(struct drm_i915_private *dev_priv,
@@ -601,6 +602,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
 {
        int cdclk = cdclk_state->cdclk;
        u32 val, cmd = cdclk_state->voltage_level;
+       intel_wakeref_t wakeref;
 
        switch (cdclk) {
        case 333333:
@@ -619,7 +621,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
         * a system suspend.  So grab the PIPE-A domain, which covers
         * the HW blocks needed for the following programming.
         */
-       intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
 
        mutex_lock(&dev_priv->pcu_lock);
        val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
@@ -637,7 +639,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
 
        vlv_program_pfi_credits(dev_priv);
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A, wakeref);
 }
 
 static int bdw_calc_cdclk(int min_cdclk)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 0c6bf82bb059..e9e21555bd4c 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -84,15 +84,17 @@ static bool intel_crt_get_hw_state(struct intel_encoder 
*encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_crt *crt = intel_encoder_to_crt(encoder);
+       intel_wakeref_t wakeref;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe);
 
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
@@ -774,6 +776,7 @@ intel_crt_detect(struct drm_connector *connector,
        struct drm_i915_private *dev_priv = to_i915(connector->dev);
        struct intel_crt *crt = intel_attached_crt(connector);
        struct intel_encoder *intel_encoder = &crt->base;
+       intel_wakeref_t wakeref;
        int status, ret;
        struct intel_load_detect_pipe tmp;
 
@@ -782,7 +785,8 @@ intel_crt_detect(struct drm_connector *connector,
                      force);
 
        if (i915_modparams.load_detect_test) {
-               intel_display_power_get(dev_priv, intel_encoder->power_domain);
+               wakeref = intel_display_power_get(dev_priv,
+                                                 intel_encoder->power_domain);
                goto load_detect;
        }
 
@@ -790,7 +794,8 @@ intel_crt_detect(struct drm_connector *connector,
        if (dmi_check_system(intel_spurious_crt_detect))
                return connector_status_disconnected;
 
-       intel_display_power_get(dev_priv, intel_encoder->power_domain);
+       wakeref = intel_display_power_get(dev_priv,
+                                         intel_encoder->power_domain);
 
        if (I915_HAS_HOTPLUG(dev_priv)) {
                /* We can not rely on the HPD pin always being correctly wired
@@ -845,7 +850,7 @@ intel_crt_detect(struct drm_connector *connector,
        }
 
 out:
-       intel_display_power_put(dev_priv, intel_encoder->power_domain);
+       intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
        return status;
 }
 
@@ -861,10 +866,12 @@ static int intel_crt_get_modes(struct drm_connector 
*connector)
        struct drm_i915_private *dev_priv = to_i915(dev);
        struct intel_crt *crt = intel_attached_crt(connector);
        struct intel_encoder *intel_encoder = &crt->base;
-       int ret;
+       intel_wakeref_t wakeref;
        struct i2c_adapter *i2c;
+       int ret;
 
-       intel_display_power_get(dev_priv, intel_encoder->power_domain);
+       wakeref = intel_display_power_get(dev_priv,
+                                         intel_encoder->power_domain);
 
        i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
        ret = intel_crt_ddc_get_modes(connector, i2c);
@@ -876,7 +883,7 @@ static int intel_crt_get_modes(struct drm_connector 
*connector)
        ret = intel_crt_ddc_get_modes(connector, i2c);
 
 out:
-       intel_display_power_put(dev_priv, intel_encoder->power_domain);
+       intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index cf9b600cca79..4870d3203ce2 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -422,7 +422,8 @@ static void csr_load_work_fn(struct work_struct *work)
        if (dev_priv->csr.dmc_payload) {
                intel_csr_load_program(dev_priv);
 
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT,
+                                       fetch_and_zero(&csr->wakeref));
 
                DRM_INFO("Finished loading DMC firmware %s (v%u.%u)\n",
                         dev_priv->csr.fw_path,
@@ -479,7 +480,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
         * Obtain a runtime pm reference, until CSR is loaded,
         * to avoid entering runtime-suspend.
         */
-       intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+       dev_priv->csr.wakeref =
+               intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 
        schedule_work(&dev_priv->csr.work);
 }
@@ -501,7 +503,8 @@ void intel_csr_ucode_suspend(struct drm_i915_private 
*dev_priv)
 
        /* Drop the reference held in case DMC isn't loaded. */
        if (!dev_priv->csr.dmc_payload)
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT,
+                                       fetch_and_zero(&dev_priv->csr.wakeref));
 }
 
 /**
@@ -520,8 +523,11 @@ void intel_csr_ucode_resume(struct drm_i915_private 
*dev_priv)
         * Reacquire the reference to keep RPM disabled in case DMC isn't
         * loaded.
         */
-       if (!dev_priv->csr.dmc_payload)
-               intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+       if (!dev_priv->csr.dmc_payload) {
+               WARN_ON(dev_priv->csr.wakeref);
+               dev_priv->csr.wakeref =
+                       intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+       }
 }
 
 /**
@@ -537,6 +543,7 @@ void intel_csr_ucode_fini(struct drm_i915_private *dev_priv)
                return;
 
        intel_csr_ucode_suspend(dev_priv);
+       WARN_ON(dev_priv->csr.wakeref);
 
        kfree(dev_priv->csr.dmc_payload);
 }
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0adc043529f2..03b48eee3ab3 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1833,12 +1833,14 @@ int intel_ddi_toggle_hdcp_signalling(struct 
intel_encoder *intel_encoder,
 {
        struct drm_device *dev = intel_encoder->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
+       intel_wakeref_t wakeref;
        enum pipe pipe = 0;
        int ret = 0;
        uint32_t tmp;
 
-       if (WARN_ON(!intel_display_power_get_if_enabled(dev_priv,
-                                               intel_encoder->power_domain)))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    
intel_encoder->power_domain);
+       if (WARN_ON(!wakeref))
                return -ENXIO;
 
        if (WARN_ON(!intel_encoder->get_hw_state(intel_encoder, &pipe))) {
@@ -1853,7 +1855,7 @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder 
*intel_encoder,
                tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
        I915_WRITE(TRANS_DDI_FUNC_CTL(pipe), tmp);
 out:
-       intel_display_power_put(dev_priv, intel_encoder->power_domain);
+       intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
        return ret;
 }
 
@@ -1864,13 +1866,15 @@ bool intel_ddi_connector_get_hw_state(struct 
intel_connector *intel_connector)
        struct intel_encoder *encoder = intel_connector->encoder;
        int type = intel_connector->base.connector_type;
        enum port port = encoder->port;
-       enum pipe pipe = 0;
        enum transcoder cpu_transcoder;
+       intel_wakeref_t wakeref;
+       enum pipe pipe = 0;
        uint32_t tmp;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        if (!encoder->get_hw_state(encoder, &pipe)) {
@@ -1912,7 +1916,7 @@ bool intel_ddi_connector_get_hw_state(struct 
intel_connector *intel_connector)
        }
 
 out:
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
@@ -1923,12 +1927,14 @@ bool intel_ddi_get_hw_state(struct intel_encoder 
*encoder,
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
        enum port port = encoder->port;
+       intel_wakeref_t wakeref;
        enum pipe p;
        u32 tmp;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        ret = false;
@@ -1988,7 +1994,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
                                  "(PHY_CTL %08x)\n", port_name(port), tmp);
        }
 
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
@@ -2948,12 +2954,13 @@ static void intel_ddi_post_disable_dp(struct 
intel_encoder *encoder,
        intel_edp_panel_vdd_on(intel_dp);
        intel_edp_panel_off(intel_dp);
 
-       intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
+       intel_display_power_put_unchecked(dev_priv,
+                                         dig_port->ddi_io_power_domain);
 
        intel_ddi_clk_disable(encoder);
 
-       intel_display_power_put(dev_priv,
-                               intel_ddi_main_link_aux_domain(intel_dp));
+       intel_display_power_put_unchecked(dev_priv,
+                                         
intel_ddi_main_link_aux_domain(intel_dp));
 }
 
 static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
@@ -2971,7 +2978,8 @@ static void intel_ddi_post_disable_hdmi(struct 
intel_encoder *encoder,
 
        intel_disable_ddi_buf(encoder);
 
-       intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
+       intel_display_power_put_unchecked(dev_priv,
+                                         dig_port->ddi_io_power_domain);
 
        intel_ddi_clk_disable(encoder);
 
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 9ac29eabad40..93d4b569c3a0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1262,17 +1262,19 @@ void assert_pipe(struct drm_i915_private *dev_priv,
        enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
                                                                      pipe);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
 
        /* we keep both pipes enabled on 830 */
        if (IS_I830(dev_priv))
                state = true;
 
        power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
-       if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (wakeref) {
                u32 val = I915_READ(PIPECONF(cpu_transcoder));
                cur_state = !!(val & PIPECONF_ENABLE);
 
-               intel_display_power_put(dev_priv, power_domain);
+               intel_display_power_put(dev_priv, power_domain, wakeref);
        } else {
                cur_state = false;
        }
@@ -3396,6 +3398,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane 
*plane,
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
        enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+       intel_wakeref_t wakeref;
        bool ret;
        u32 val;
 
@@ -3405,7 +3408,8 @@ static bool i9xx_plane_get_hw_state(struct intel_plane 
*plane,
         * display power wells.
         */
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        val = I915_READ(DSPCNTR(i9xx_plane));
@@ -3418,7 +3422,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane 
*plane,
                *pipe = (val & DISPPLANE_SEL_PIPE_MASK) >>
                        DISPPLANE_SEL_PIPE_SHIFT;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -5974,7 +5978,7 @@ static void modeset_put_power_domains(struct 
drm_i915_private *dev_priv,
        enum intel_display_power_domain domain;
 
        for_each_power_domain(domain, domains)
-               intel_display_power_put(dev_priv, domain);
+               intel_display_power_put_unchecked(dev_priv, domain);
 }
 
 static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
@@ -6221,7 +6225,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc 
*crtc,
 
        domains = intel_crtc->enabled_power_domains;
        for_each_power_domain(domain, domains)
-               intel_display_power_put(dev_priv, domain);
+               intel_display_power_put_unchecked(dev_priv, domain);
        intel_crtc->enabled_power_domains = 0;
 
        dev_priv->active_crtcs &= ~(1 << intel_crtc->pipe);
@@ -7824,11 +7828,13 @@ static bool i9xx_get_pipe_config(struct intel_crtc 
*crtc,
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        uint32_t tmp;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
@@ -7928,7 +7934,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -8874,11 +8880,13 @@ static bool ironlake_get_pipe_config(struct intel_crtc 
*crtc,
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        uint32_t tmp;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
@@ -8960,7 +8968,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc 
*crtc,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -9568,7 +9576,7 @@ static bool haswell_get_pipe_config(struct intel_crtc 
*crtc,
 
 out:
        for_each_power_domain(power_domain, power_domain_mask)
-               intel_display_power_put(dev_priv, power_domain);
+               intel_display_power_put_unchecked(dev_priv, power_domain);
 
        return active;
 }
@@ -9787,17 +9795,19 @@ static bool i845_cursor_get_hw_state(struct intel_plane 
*plane,
 {
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(PIPE_A);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        ret = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
 
        *pipe = PIPE_A;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -10006,6 +10016,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane 
*plane,
 {
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        bool ret;
        u32 val;
 
@@ -10015,7 +10026,8 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane 
*plane,
         * display power wells.
         */
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        val = I915_READ(CURCNTR(plane->pipe));
@@ -10028,7 +10040,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane 
*plane,
                *pipe = (val & MCURSOR_PIPE_SELECT_MASK) >>
                        MCURSOR_PIPE_SELECT_SHIFT;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -12579,6 +12591,7 @@ static void intel_atomic_commit_tail(struct 
drm_atomic_state *state)
        struct drm_crtc *crtc;
        struct intel_crtc_state *intel_cstate;
        u64 put_domains[I915_MAX_PIPES] = {};
+       intel_wakeref_t wakeref = 0;
        int i;
 
        intel_atomic_commit_fence_wait(intel_state);
@@ -12586,7 +12599,7 @@ static void intel_atomic_commit_tail(struct 
drm_atomic_state *state)
        drm_atomic_helper_wait_for_dependencies(state);
 
        if (intel_state->modeset)
-               intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
+               wakeref = intel_display_power_get(dev_priv, 
POWER_DOMAIN_MODESET);
 
        for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, 
new_crtc_state, i) {
                struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -12727,7 +12740,7 @@ static void intel_atomic_commit_tail(struct 
drm_atomic_state *state)
                 * the culprit.
                 */
                intel_uncore_arm_unclaimed_mmio_detection(dev_priv);
-               intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
+               intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET, 
wakeref);
        }
 
        /*
@@ -15602,19 +15615,25 @@ void i915_redisable_vga_power_on(struct 
drm_i915_private *dev_priv)
 
 void i915_redisable_vga(struct drm_i915_private *dev_priv)
 {
-       /* This function can be called both from intel_modeset_setup_hw_state or
+       intel_wakeref_t wakeref;
+
+       /*
+        * This function can be called both from intel_modeset_setup_hw_state or
         * at a very early point in our resume sequence, where the power well
         * structures are not yet restored. Since this function is at a very
         * paranoid "someone might have enabled VGA while we were not looking"
         * level, just check if the power well is enabled instead of trying to
         * follow the "don't touch the power well if we don't need it" policy
-        * the rest of the driver uses. */
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_VGA))
+        * the rest of the driver uses.
+        */
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_VGA);
+       if (!wakeref)
                return;
 
        i915_redisable_vga_power_on(dev_priv);
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_VGA);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_VGA, wakeref);
 }
 
 /* FIXME read out full plane state for all planes */
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8e0e14ba534f..b4c22c0bc595 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -678,7 +678,7 @@ static void pps_unlock(struct intel_dp *intel_dp)
 
        mutex_unlock(&dev_priv->pps_mutex);
 
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put_unchecked(dev_priv, intel_dp->aux_power_domain);
 }
 
 static void
@@ -2401,7 +2401,7 @@ static void edp_panel_vdd_off_sync(struct intel_dp 
*intel_dp)
        if ((pp & PANEL_POWER_ON) == 0)
                intel_dp->panel_power_off_time = ktime_get_boottime();
 
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put_unchecked(dev_priv, intel_dp->aux_power_domain);
 }
 
 static void edp_panel_vdd_work(struct work_struct *__work)
@@ -2545,7 +2545,7 @@ static void edp_panel_off(struct intel_dp *intel_dp)
        intel_dp->panel_power_off_time = ktime_get_boottime();
 
        /* We got a reference when we enabled the VDD. */
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put_unchecked(dev_priv, intel_dp->aux_power_domain);
 }
 
 void intel_edp_panel_off(struct intel_dp *intel_dp)
@@ -2855,16 +2855,18 @@ static bool intel_dp_get_hw_state(struct intel_encoder 
*encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+       intel_wakeref_t wakeref;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg,
                                    encoder->port, pipe);
 
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
@@ -4928,11 +4930,12 @@ intel_dp_long_pulse(struct intel_connector *connector)
        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
        struct intel_dp *intel_dp = intel_attached_dp(&connector->base);
        enum drm_connector_status status;
+       intel_wakeref_t wakeref;
        u8 sink_irq_vector = 0;
 
        
WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
 
-       intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+       wakeref = intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
 
        /* Can't disconnect eDP */
        if (intel_dp_is_edp(intel_dp))
@@ -5016,7 +5019,7 @@ intel_dp_long_pulse(struct intel_connector *connector)
        if (status != connector_status_connected && !intel_dp->is_mst)
                intel_dp_unset_edid(intel_dp);
 
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put(dev_priv, intel_dp->aux_power_domain, wakeref);
        return status;
 }
 
@@ -5057,6 +5060,7 @@ intel_dp_force(struct drm_connector *connector)
        struct intel_dp *intel_dp = intel_attached_dp(connector);
        struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
        struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
+       intel_wakeref_t wakeref;
 
        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
                      connector->base.id, connector->name);
@@ -5065,11 +5069,11 @@ intel_dp_force(struct drm_connector *connector)
        if (connector->status != connector_status_connected)
                return;
 
-       intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+       wakeref = intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
 
        intel_dp_set_edid(intel_dp);
 
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put(dev_priv, intel_dp->aux_power_domain, wakeref);
 }
 
 static int intel_dp_get_modes(struct drm_connector *connector)
@@ -5524,6 +5528,7 @@ intel_dp_hpd_pulse(struct intel_digital_port 
*intel_dig_port, bool long_hpd)
        struct intel_dp *intel_dp = &intel_dig_port->dp;
        struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
        enum irqreturn ret = IRQ_NONE;
+       intel_wakeref_t wakeref;
 
        if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {
                /*
@@ -5547,7 +5552,7 @@ intel_dp_hpd_pulse(struct intel_digital_port 
*intel_dig_port, bool long_hpd)
                return IRQ_NONE;
        }
 
-       intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+       wakeref = intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
 
        if (intel_dp->is_mst) {
                if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
@@ -5582,7 +5587,7 @@ intel_dp_hpd_pulse(struct intel_digital_port 
*intel_dig_port, bool long_hpd)
        ret = IRQ_HANDLED;
 
 put_power:
-       intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+       intel_display_power_put(dev_priv, intel_dp->aux_power_domain, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c 
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 20c90688a48a..4941101762f5 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -344,9 +344,12 @@ static bool ibx_pch_dpll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                      struct intel_dpll_hw_state *hw_state)
 {
        const enum intel_dpll_id id = pll->info->id;
+       intel_wakeref_t wakeref;
        uint32_t val;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        val = I915_READ(PCH_DPLL(id));
@@ -354,7 +357,7 @@ static bool ibx_pch_dpll_get_hw_state(struct 
drm_i915_private *dev_priv,
        hw_state->fp0 = I915_READ(PCH_FP0(id));
        hw_state->fp1 = I915_READ(PCH_FP1(id));
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return val & DPLL_VCO_ENABLE;
 }
@@ -516,15 +519,18 @@ static bool hsw_ddi_wrpll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                       struct intel_dpll_hw_state *hw_state)
 {
        const enum intel_dpll_id id = pll->info->id;
+       intel_wakeref_t wakeref;
        uint32_t val;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        val = I915_READ(WRPLL_CTL(id));
        hw_state->wrpll = val;
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return val & WRPLL_PLL_ENABLE;
 }
@@ -533,15 +539,18 @@ static bool hsw_ddi_spll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                      struct intel_shared_dpll *pll,
                                      struct intel_dpll_hw_state *hw_state)
 {
+       intel_wakeref_t wakeref;
        uint32_t val;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        val = I915_READ(SPLL_CTL);
        hw_state->spll = val;
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return val & SPLL_PLL_ENABLE;
 }
@@ -996,9 +1005,12 @@ static bool skl_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
        uint32_t val;
        const struct skl_dpll_regs *regs = skl_dpll_regs;
        const enum intel_dpll_id id = pll->info->id;
+       intel_wakeref_t wakeref;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        ret = false;
@@ -1018,7 +1030,7 @@ static bool skl_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return ret;
 }
@@ -1027,12 +1039,15 @@ static bool skl_ddi_dpll0_get_hw_state(struct 
drm_i915_private *dev_priv,
                                       struct intel_shared_dpll *pll,
                                       struct intel_dpll_hw_state *hw_state)
 {
-       uint32_t val;
        const struct skl_dpll_regs *regs = skl_dpll_regs;
        const enum intel_dpll_id id = pll->info->id;
+       intel_wakeref_t wakeref;
+       uint32_t val;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        ret = false;
@@ -1048,7 +1063,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct 
drm_i915_private *dev_priv,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return ret;
 }
@@ -1586,14 +1601,17 @@ static bool bxt_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                        struct intel_dpll_hw_state *hw_state)
 {
        enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
-       uint32_t val;
-       bool ret;
+       intel_wakeref_t wakeref;
        enum dpio_phy phy;
        enum dpio_channel ch;
+       uint32_t val;
+       bool ret;
 
        bxt_port_to_phy_channel(dev_priv, port, &phy, &ch);
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        ret = false;
@@ -1650,7 +1668,7 @@ static bool bxt_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return ret;
 }
@@ -2098,10 +2116,13 @@ static bool cnl_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                     struct intel_dpll_hw_state *hw_state)
 {
        const enum intel_dpll_id id = pll->info->id;
+       intel_wakeref_t wakeref;
        uint32_t val;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        ret = false;
@@ -2120,7 +2141,7 @@ static bool cnl_ddi_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
        ret = true;
 
 out:
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
 
        return ret;
 }
@@ -2946,11 +2967,14 @@ static bool icl_pll_get_hw_state(struct 
drm_i915_private *dev_priv,
                                 struct intel_dpll_hw_state *hw_state)
 {
        const enum intel_dpll_id id = pll->info->id;
-       uint32_t val;
-       enum port port;
+       intel_wakeref_t wakeref;
        bool ret = false;
+       enum port port;
+       uint32_t val;
 
-       if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    POWER_DOMAIN_PLLS);
+       if (!wakeref)
                return false;
 
        val = I915_READ(icl_pll_id_to_enable_reg(id));
@@ -3012,7 +3036,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private 
*dev_priv,
 
        ret = true;
 out:
-       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
        return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 4bf1d9458389..19b94c0ad439 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1967,12 +1967,21 @@ bool intel_display_power_is_enabled(struct 
drm_i915_private *dev_priv,
                                    enum intel_display_power_domain domain);
 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
                                      enum intel_display_power_domain domain);
-void intel_display_power_get(struct drm_i915_private *dev_priv,
-                            enum intel_display_power_domain domain);
-bool intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
                                        enum intel_display_power_domain domain);
+intel_wakeref_t
+intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+                                  enum intel_display_power_domain domain);
+void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
+                                      enum intel_display_power_domain domain);
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RPM)
 void intel_display_power_put(struct drm_i915_private *dev_priv,
-                            enum intel_display_power_domain domain);
+                            enum intel_display_power_domain domain,
+                            intel_wakeref_t wakeref);
+#else
+#define intel_display_power_put(i915, domain, wakeref) \
+       intel_display_power_put_unchecked(i915, domain)
+#endif
 void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
                            u8 req_slices);
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index 8363fbd18ee8..81ad2f446d50 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1173,15 +1173,17 @@ static bool intel_hdmi_get_hw_state(struct 
intel_encoder *encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
+       intel_wakeref_t wakeref;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe);
 
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
@@ -1867,11 +1869,12 @@ intel_hdmi_set_edid(struct drm_connector *connector)
 {
        struct drm_i915_private *dev_priv = to_i915(connector->dev);
        struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
+       intel_wakeref_t wakeref;
        struct edid *edid;
        bool connected = false;
        struct i2c_adapter *i2c;
 
-       intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
 
        i2c = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus);
 
@@ -1886,7 +1889,7 @@ intel_hdmi_set_edid(struct drm_connector *connector)
 
        intel_hdmi_dp_dual_mode_detect(connector, edid != NULL);
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
 
        to_intel_connector(connector)->detect_edid = edid;
        if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) {
@@ -1905,13 +1908,14 @@ intel_hdmi_set_edid(struct drm_connector *connector)
 static enum drm_connector_status
 intel_hdmi_detect(struct drm_connector *connector, bool force)
 {
-       enum drm_connector_status status;
        struct drm_i915_private *dev_priv = to_i915(connector->dev);
+       enum drm_connector_status status;
+       intel_wakeref_t wakeref;
 
        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
                      connector->base.id, connector->name);
 
-       intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
 
        intel_hdmi_unset_edid(connector);
 
@@ -1920,7 +1924,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool 
force)
        else
                status = connector_status_disconnected;
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
 
        return status;
 }
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index bef32b7c248e..d7dd70b15d83 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -700,12 +700,13 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg 
*msgs, int num,
 static int
 gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
 {
-       struct intel_gmbus *bus = container_of(adapter, struct intel_gmbus,
-                                              adapter);
+       struct intel_gmbus *bus =
+               container_of(adapter, struct intel_gmbus, adapter);
        struct drm_i915_private *dev_priv = bus->dev_priv;
+       intel_wakeref_t wakeref;
        int ret;
 
-       intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
 
        if (bus->force_bit) {
                ret = i2c_bit_algo.master_xfer(adapter, msgs, num);
@@ -717,17 +718,16 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg 
*msgs, int num)
                        bus->force_bit |= GMBUS_FORCE_BIT_RETRY;
        }
 
-       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
 
        return ret;
 }
 
 int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
 {
-       struct intel_gmbus *bus = container_of(adapter, struct intel_gmbus,
-                                              adapter);
+       struct intel_gmbus *bus =
+               container_of(adapter, struct intel_gmbus, adapter);
        struct drm_i915_private *dev_priv = bus->dev_priv;
-       int ret;
        u8 cmd = DRM_HDCP_DDC_AKSV;
        u8 buf[DRM_HDCP_KSV_LEN] = { 0 };
        struct i2c_msg msgs[] = {
@@ -744,8 +744,10 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
                        .buf = buf,
                }
        };
+       intel_wakeref_t wakeref;
+       int ret;
 
-       intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+       wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
        mutex_lock(&dev_priv->gmbus_mutex);
 
        /*
@@ -756,7 +758,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
        ret = do_gmbus_xfer(adapter, msgs, ARRAY_SIZE(msgs), GMBUS_AKSV_SELECT);
 
        mutex_unlock(&dev_priv->gmbus_mutex);
-       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
+       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_lvds.c 
b/drivers/gpu/drm/i915/intel_lvds.c
index f9f3b0885ba5..e22537769b53 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -104,15 +104,17 @@ static bool intel_lvds_get_hw_state(struct intel_encoder 
*encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_lvds_encoder *lvds_encoder = 
to_lvds_encoder(&encoder->base);
+       intel_wakeref_t wakeref;
        bool ret;
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        ret = intel_lvds_port_enabled(dev_priv, lvds_encoder->reg, pipe);
 
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c 
b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 849e1b69ba73..ac853cc0c854 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -475,6 +475,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const 
char *source_name,
        struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[crtc->index];
        enum intel_display_power_domain power_domain;
        enum intel_pipe_crc_source source;
+       intel_wakeref_t wakeref;
        u32 val = 0; /* shut up gcc */
        int ret = 0;
 
@@ -484,7 +485,8 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const 
char *source_name,
        }
 
        power_domain = POWER_DOMAIN_PIPE(crtc->index);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) {
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref) {
                DRM_DEBUG_KMS("Trying to capture CRC while pipe is off\n");
                return -EIO;
        }
@@ -511,7 +513,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const 
char *source_name,
        *values_cnt = 5;
 
 out:
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ea1b164519cd..44ac9de48489 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3965,16 +3965,19 @@ void skl_ddb_get_hw_state(struct drm_i915_private 
*dev_priv,
                enum intel_display_power_domain power_domain;
                enum plane_id plane_id;
                enum pipe pipe = crtc->pipe;
+               intel_wakeref_t wakeref;
 
                power_domain = POWER_DOMAIN_PIPE(pipe);
-               if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+               wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                            power_domain);
+               if (!wakeref)
                        continue;
 
                for_each_plane_id_on_crtc(crtc, plane_id)
                        skl_ddb_get_hw_plane_state(dev_priv, pipe,
                                                   plane_id, ddb);
 
-               intel_display_power_put(dev_priv, power_domain);
+               intel_display_power_put(dev_priv, power_domain, wakeref);
        }
 }
 
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 805c52b232f5..043223e8fa51 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -460,7 +460,7 @@ void intel_display_set_init_power(struct drm_i915_private 
*dev_priv,
        if (enable)
                intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
        else
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put_unchecked(dev_priv, POWER_DOMAIN_INIT);
 
        dev_priv->power_domains.init_power_on = enable;
 }
@@ -1741,18 +1741,19 @@ __intel_display_power_get_domain(struct 
drm_i915_private *dev_priv,
  * Any power domain reference obtained by this function must have a symmetric
  * call to intel_display_power_put() to release the reference again.
  */
-void intel_display_power_get(struct drm_i915_private *dev_priv,
-                            enum intel_display_power_domain domain)
+intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
+                                       enum intel_display_power_domain domain)
 {
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
-
-       intel_runtime_pm_get(dev_priv);
+       intel_wakeref_t wakeref = intel_runtime_pm_get(dev_priv);
 
        mutex_lock(&power_domains->lock);
 
        __intel_display_power_get_domain(dev_priv, domain);
 
        mutex_unlock(&power_domains->lock);
+
+       return wakeref;
 }
 
 /**
@@ -1767,13 +1768,16 @@ void intel_display_power_get(struct drm_i915_private 
*dev_priv,
  * Any power domain reference obtained by this function must have a symmetric
  * call to intel_display_power_put() to release the reference again.
  */
-bool intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
-                                       enum intel_display_power_domain domain)
+intel_wakeref_t
+intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+                                  enum intel_display_power_domain domain)
 {
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
+       intel_wakeref_t wakeref;
        bool is_enabled;
 
-       if (!intel_runtime_pm_get_if_in_use(dev_priv))
+       wakeref = intel_runtime_pm_get_if_in_use(dev_priv);
+       if (!wakeref)
                return false;
 
        mutex_lock(&power_domains->lock);
@@ -1787,23 +1791,16 @@ bool intel_display_power_get_if_enabled(struct 
drm_i915_private *dev_priv,
 
        mutex_unlock(&power_domains->lock);
 
-       if (!is_enabled)
-               intel_runtime_pm_put_unchecked(dev_priv);
+       if (!is_enabled) {
+               intel_runtime_pm_put(dev_priv, wakeref);
+               wakeref = 0;
+       }
 
-       return is_enabled;
+       return wakeref;
 }
 
-/**
- * intel_display_power_put - release a power domain reference
- * @dev_priv: i915 device instance
- * @domain: power domain to reference
- *
- * This function drops the power domain reference obtained by
- * intel_display_power_get() and might power down the corresponding hardware
- * block right away if this is the last reference.
- */
-void intel_display_power_put(struct drm_i915_private *dev_priv,
-                            enum intel_display_power_domain domain)
+static void __intel_display_power_put(struct drm_i915_private *dev_priv,
+                                     enum intel_display_power_domain domain)
 {
        struct i915_power_domains *power_domains;
        struct i915_power_well *power_well;
@@ -1821,10 +1818,34 @@ void intel_display_power_put(struct drm_i915_private 
*dev_priv,
                intel_power_well_put(dev_priv, power_well);
 
        mutex_unlock(&power_domains->lock);
+}
 
+/**
+ * intel_display_power_put - release a power domain reference
+ * @dev_priv: i915 device instance
+ * @domain: power domain to reference
+ *
+ * This function drops the power domain reference obtained by
+ * intel_display_power_get() and might power down the corresponding hardware
+ * block right away if this is the last reference.
+ */
+void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
+                                      enum intel_display_power_domain domain)
+{
+       __intel_display_power_put(dev_priv, domain);
        intel_runtime_pm_put_unchecked(dev_priv);
 }
 
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RPM)
+void intel_display_power_put(struct drm_i915_private *dev_priv,
+                            enum intel_display_power_domain domain,
+                            intel_wakeref_t wakeref)
+{
+       __intel_display_power_put(dev_priv, domain);
+       intel_runtime_pm_put(dev_priv, wakeref);
+}
+#endif
+
 #define I830_PIPES_POWER_DOMAINS (             \
        BIT_ULL(POWER_DOMAIN_PIPE_A) |          \
        BIT_ULL(POWER_DOMAIN_PIPE_B) |          \
@@ -3990,7 +4011,7 @@ void intel_power_domains_fini_hw(struct drm_i915_private 
*dev_priv)
 
        /* Remove the refcount we took to keep power well support disabled. */
        if (!i915_modparams.disable_power_well)
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put_unchecked(dev_priv, POWER_DOMAIN_INIT);
 }
 
 /**
@@ -4007,7 +4028,7 @@ void intel_power_domains_suspend(struct drm_i915_private 
*dev_priv)
         * power wells while we are system suspended.
         */
        if (!i915_modparams.disable_power_well)
-               intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+               intel_display_power_put_unchecked(dev_priv, POWER_DOMAIN_INIT);
 
        if (IS_ICELAKE(dev_priv))
                icl_display_core_uninit(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index f7026e887fa9..c863ed79dd9c 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -353,17 +353,19 @@ skl_plane_get_hw_state(struct intel_plane *plane,
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
        enum plane_id plane_id = plane->id;
+       intel_wakeref_t wakeref;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        ret = I915_READ(PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;
 
        *pipe = plane->pipe;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -616,17 +618,19 @@ vlv_plane_get_hw_state(struct intel_plane *plane,
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
        enum plane_id plane_id = plane->id;
+       intel_wakeref_t wakeref;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        ret = I915_READ(SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;
 
        *pipe = plane->pipe;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -783,17 +787,19 @@ ivb_plane_get_hw_state(struct intel_plane *plane,
 {
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        ret =  I915_READ(SPRCTL(plane->pipe)) & SPRITE_ENABLE;
 
        *pipe = plane->pipe;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
@@ -941,17 +947,19 @@ g4x_plane_get_hw_state(struct intel_plane *plane,
 {
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
+       intel_wakeref_t wakeref;
        bool ret;
 
        power_domain = POWER_DOMAIN_PIPE(plane->pipe);
-       if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+       if (!wakeref)
                return false;
 
        ret = I915_READ(DVSCNTR(plane->pipe)) & DVS_ENABLE;
 
        *pipe = plane->pipe;
 
-       intel_display_power_put(dev_priv, power_domain);
+       intel_display_power_put(dev_priv, power_domain, wakeref);
 
        return ret;
 }
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index 435a2c35ee8c..6ece550f4c1c 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1020,13 +1020,15 @@ static bool intel_dsi_get_hw_state(struct intel_encoder 
*encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+       intel_wakeref_t wakeref;
        enum port port;
        bool active = false;
 
        DRM_DEBUG_KMS("\n");
 
-       if (!intel_display_power_get_if_enabled(dev_priv,
-                                               encoder->power_domain))
+       wakeref = intel_display_power_get_if_enabled(dev_priv,
+                                                    encoder->power_domain);
+       if (!wakeref)
                return false;
 
        /*
@@ -1082,7 +1084,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder 
*encoder,
        }
 
 out_put_power:
-       intel_display_power_put(dev_priv, encoder->power_domain);
+       intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
 
        return active;
 }
-- 
2.18.0

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