On 19/02/2019 10:28, Chris Wilson wrote:
Switch to using coherent reads that are serialised with the register
read to avoid the memory latency problem in favour over an arbitrary
delay. The only zeroes seen during testing on HSW+ have been from
configuration changes that do not update (therefore were truly zero
entries and should be skipped).
Signed-off-by: Chris Wilson<[email protected]>
Cc: Lionel Landwerlin<[email protected]>
Cc: Matthew Auld<[email protected]>
---
drivers/gpu/drm/i915/i915_drv.h | 59 ---
drivers/gpu/drm/i915/i915_perf.c | 625 +++++--------------------------
2 files changed, 87 insertions(+), 597 deletions(-)
Thanks,
I'll try i915_vma_pin_iomap() + I915_READ_FW() and see if the DRM_NOTE
go away.
-Lionel
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