On Fri, Feb 14, 2020 at 02:27:35PM +0000, Shankar, Uma wrote: > > > > -----Original Message----- > > From: Ville Syrjälä <[email protected]> > > Sent: Friday, February 14, 2020 6:40 PM > > To: Kadiyala, Kishore <[email protected]> > > Cc: [email protected]; Shankar, Uma <[email protected]> > > Subject: Re: [Intel-gfx] [PATCH] Add support for Color encoding YCBCR_BT2020 > > > > On Fri, Feb 14, 2020 at 04:23:16PM +0530, Kishore Kadiyala wrote: > > > Currently the plane property doesn't have support for YCBCR_BT2020, > > > which enables the corresponding color conversion mode on plane CSC. > > > > > > Signed-off-by: Kishore Kadiyala <[email protected]> > > > Cc: Uma Shankar <[email protected]> > > > --- > > > drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++++++-- > > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > > > b/drivers/gpu/drm/i915/display/intel_sprite.c > > > index 7abeefe8dce5..5169a7260d7c 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > > > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > > > @@ -3011,6 +3011,7 @@ skl_universal_plane_create(struct drm_i915_private > > *dev_priv, > > > struct intel_plane *plane; > > > enum drm_plane_type plane_type; > > > unsigned int supported_rotations; > > > + unsigned int supported_csc; > > > unsigned int possible_crtcs; > > > const u64 *modifiers; > > > const u32 *formats; > > > @@ -3088,9 +3089,13 @@ skl_universal_plane_create(struct drm_i915_private > > *dev_priv, > > > DRM_MODE_ROTATE_0, > > > supported_rotations); > > > > > > + supported_csc = BIT(DRM_COLOR_YCBCR_BT601) | > > > +BIT(DRM_COLOR_YCBCR_BT709); > > > + > > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > > + supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020); > > > > Missing the actual code to enable it on glk and icl+ sdr planes, so this > > will not work. > > Yeah this need to be handled for Non HDR planes. > > > IIRC there was also some kind of hw fail related to some BT.something > > conversions. > > But I can't remember if that was in the RGB->RGB or > > YUV->RGB logic. > > Will try to check this out. What kind of fails Ville, was it not all working > or artifacts ?
IIRC a wrong coefficient was used in one of the hardcoded hw matrices. Should be listed on the bspec w/a page. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
