From: Ville Syrjälä <ville.syrj...@linux.intel.com>
Calculate delayed vblank start position with the help of added
vmin/vmax stuff for next frame and final computation.
--v2:
- Correct Author details.
--v3:
- Separate register details from this patch.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 57 ++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_vrr.h | 5 +++
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index adfd231eb578..ab4f8def821c 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -746,3 +746,60 @@ void intel_vrr_get_config(struct intel_crtc_state
*crtc_state)
if (crtc_state->vrr.enable)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
}
+
+int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state
*crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(display,
cpu_transcoder));
+
+ if (REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_CNT_MASK, tmp) == 0)
+ return -1;
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_MASK,
tmp) + 1);
+}
+
+int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state
*crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_DCB_ADJ_VMAX_CFG(display,
cpu_transcoder));
+
+ if (REG_FIELD_GET(VRR_DCB_ADJ_VMAX_CNT_MASK, tmp) == 0)
+ return -1;
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_DCB_ADJ_VMAX_MASK, tmp)
+ 1);
+}
+
+int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state
*crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_FLIPLINE_DCB(display, cpu_transcoder));
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_FLIPLINE_DCB_MASK, tmp)
+ 1);
+}
+
+int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state
*crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display, TRANS_VRR_VMAX_DCB(display,
cpu_transcoder));
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_VMAX_DCB_MASK, tmp) +
1);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
b/drivers/gpu/drm/i915/display/intel_vrr.h
index 38bf9996b883..e62b8b50aec6 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -42,4 +42,9 @@ void intel_vrr_transcoder_disable(const struct
intel_crtc_state *crtc_state);
void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
+int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state
*crtc_state);
+int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state
*crtc_state);
+int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state
*crtc_state);
+int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state
*crtc_state);
+
#endif /* __INTEL_VRR_H__ */
--
2.48.1
