Move DG2 MPLLB handling over to the shared DPLL framework. DG2 is not yet integrated into the shared DPLL framework. Instead it still handles MPLLB setup through DG2-specific paths: clock computation calls intel_mpllb_calc_state() directly, encoder clock hooks enable and disable MPLLB directly, and DDI readout reads MPLLB state directly from the encoder path.
Add a DG2 DPLL manager for MPLLB-backed port PLLs and switch DG2 over to use the generic DPLL framework compute, reserve, enable, disable, and readout flow. Split the series into four steps: - refactor the MPLLB enable helper - add DG2 DPLL manager support - convert DG2 users to framework-style paths - switch DG2 over to the DPLL framework and remove the old direct clock hooks Mika Kahola (4): drm/i915/display: Split out DG2 MPLLB enable helper drm/i915/display: Add DG2 MPLLB DPLL manager support drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework drm/i915/display: Switch DG2 to use DPLL framework drivers/gpu/drm/i915/display/intel_ddi.c | 30 ++- drivers/gpu/drm/i915/display/intel_dpll.c | 22 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 238 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 22 ++ .../drm/i915/display/intel_modeset_verify.c | 1 - drivers/gpu/drm/i915/display/intel_snps_phy.c | 60 +---- drivers/gpu/drm/i915/display/intel_snps_phy.h | 2 + 7 files changed, 293 insertions(+), 82 deletions(-) -- 2.43.0
