On Mon, Oct 09, 2023 at 05:07:06AM -0400, Mateusz Polchlopek wrote: > For performance reasons there is a need to have support for selectable > Tx scheduler topology. Currently firmware supports only the default > 9-layer and 5-layer topology. This patch series enables switch from > default to 5-layer topology, if user decides to opt-in. > > --- > v3: > - fixed documentation warnings > > v2: > - updated documentation > - reorder of variables list (default-init first) > - comments changed to be more descriptive > - added elseif's instead of few if's > - returned error when ice_request_fw fails > - ice_cfg_tx_topo() changed to take const u8 as parameter (get rid of copy > buffer) > - renamed all "balance" occurences to the new one > - prevent fail of ice_aq_read_nvm() function > - unified variables names (int err instead of int status in few > functions) > - some smaller fixes, typo fixes > https://lore.kernel.org/netdev/[email protected]/ > > v1: > https://lore.kernel.org/netdev/[email protected]/ > --- > > Lukasz Czapnik (1): > ice: Add tx_scheduling_layers devlink param > > Michal Wilczynski (2): > ice: Enable switching default Tx scheduler topology > ice: Document tx_scheduling_layers parameter > > Raj Victor (2): > ice: Support 5 layer topology > ice: Adjust the VSI/Aggregator layers
For series, Reviewed-by: Simon Horman <[email protected]> _______________________________________________ Intel-wired-lan mailing list [email protected] https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
