> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of Anil > Samal > Sent: Friday, June 14, 2024 6:28 PM > To: [email protected] > Cc: [email protected]; Czapnik, Lukasz <[email protected]>; > Samal, Anil <[email protected]>; Pepiak, Leszek <[email protected]>; > Nguyen, Anthony L <[email protected]>; Simon Horman > <[email protected]>; Kitszel, Przemyslaw <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-next v3 2/3] ice: Implement driver > functionality to dump fec statistics > > To debug link issues in the field, it is paramount to dump fec > corrected/uncorrected block counts from firmware. > Firmware requires PCS quad number and PCS port number to read FEC statistics. > Current driver implementation does not maintain above physical properties of > a port. > > Add new driver API to derive physical properties of an input port.These > properties include PCS quad number, PCS port number, serdes lane count, > primary serdes lane number. > Extend ethtool option '--show-fec' to support fec statistics. > The IEEE standard mandates two sets of counters: > - 30.5.1.1.17 aFECCorrectedBlocks > - 30.5.1.1.18 aFECUncorrectableBlocks > > Standard defines above statistics per lane but current implementation > supports total FEC statistics per port i.e. sum of all lane per port. Find > sample output below > > FEC parameters for ens21f0np0: > Supported/Configured FEC encodings: Auto RS BaseR Active FEC encoding: RS > Statistics: > corrected_blocks: 0 > uncorrectable_blocks: 0 > > Reviewed-by: Simon Horman <[email protected]> > Reviewed-by: Jesse Brandeburg <[email protected]> > Signed-off-by: Anil Samal <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_common.c | 57 ++++ > drivers/net/ethernet/intel/ice/ice_common.h | 24 ++ > drivers/net/ethernet/intel/ice/ice_ethtool.c | 308 +++++++++++++++++++ > drivers/net/ethernet/intel/ice/ice_ethtool.h | 10 + > drivers/net/ethernet/intel/ice/ice_type.h | 8 + > 5 files changed, 407 insertions(+) >
Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel)
