Milena Olech wrote: > PTP capabilities are negotiated using virtchnl commands. There are two > available modes of the PTP support: direct and mailbox. When the direct > access to PTP resources is negotiated, virtchnl messages returns a set > of registers that allow read/write directly. When the mailbox access to > PTP resources is negotiated, virtchnl messages are used to access > PTP clock and to read the timestamp values. > > Virtchnl API covers both modes and exposes a set of PTP capabilities. > > Using virtchnl API, the driver recognizes also HW abilities - maximum > adjustment of the clock and the basic increment value. > > Additionally, API allows to configure the secondary mailbox, dedicated > exclusively for PTP purposes. > > Reviewed-by: Alexander Lobakin <[email protected]> > Signed-off-by: Milena Olech <[email protected]>
minor issue, with that addressed Reviewed-by: Willem de Bruijn <[email protected]> > +/** > + * struct virtchnl2_ptp_set_dev_clk_time: Associated with message > + * VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME. > + * @dev_time_ns: Device time value expressed in nanoseconds to set > + * > + * PF/VF sends this message to set the time of the main timer. > + */ > +struct virtchnl2_ptp_set_dev_clk_time { > + __le64 dev_time_ns; > +}; > +VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_set_dev_clk_time); > + > +/** > + * struct virtchnl2_ptp_set_dev_clk_time: Associated with message > + * VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE. minor: virtchnl2_ptp_adj_dev_clk_fine > + * @incval: Source timer increment value per clock cycle > + * > + * PF/VF sends this message to adjust the frequency of the main timer by the > + * indicated scaled ppm. > + */ > +struct virtchnl2_ptp_adj_dev_clk_fine { > + __le64 incval; > +}; > +VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_adj_dev_clk_fine);
