> -----Original Message-----
> From: Intel-wired-lan <[email protected]> On Behalf Of
> Emil Tantilov
> Sent: Thursday, November 21, 2024 8:41 PM
> To: [email protected]
> Cc: [email protected]; Kitszel, Przemyslaw
> <[email protected]>; Samudrala, Sridhar
> <[email protected]>; [email protected]; [email protected];
> [email protected]; Hay, Joshua A <[email protected]>; Nguyen,
> Anthony L <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected]; Lobakin,
> Aleksander <[email protected]>
> Subject: [Intel-wired-lan] [PATCH iwl-net v2] idpf: add read memory barrier
> when checking descriptor done bit
>
> Add read memory barrier to ensure the order of operations when accessing
> control queue descriptors. Specifically, we want to avoid cases where loads
> can be reordered:
>
> 1. Load #1 is dispatched to read descriptor flags.
> 2. Load #2 is dispatched to read some other field from the descriptor.
> 3. Load #2 completes, accessing memory/cache at a point in time when the DD
> flag is zero.
> 4. NIC DMA overwrites the descriptor, now the DD flag is one.
> 5. Any fields loaded before step 4 are now inconsistent with the actual
> descriptor state.
>
> Add read memory barrier between steps 1 and 2, so that load #2 is not
> executed until load #1 has completed.
>
> Fixes: 8077c727561a ("idpf: add controlq init and reset checks")
> Reviewed-by: Przemek Kitszel <[email protected]>
> Reviewed-by: Sridhar Samudrala <[email protected]>
> Suggested-by: Lance Richardson <[email protected]>
> Signed-off-by: Emil Tantilov <[email protected]>
> ---
> Changelog
> v2:
> - Rewrote comment to fit on a single line
> - Added new line as separator
> - Updated last sentence in commit message to include load #
> v1:
> https://lore.kernel.org/intel-wired-lan/20241115021618.20565-1-
> [email protected]/
> ---
> drivers/net/ethernet/intel/idpf/idpf_controlq.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Tested-by: Krishneil Singh <[email protected]>
