> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of > Grzegorz Nitka > Sent: 10 February 2025 19:41 > To: [email protected] > Cc: [email protected]; Kolacinski, Karol <[email protected]>; > Nguyen, Anthony L <[email protected]>; [email protected]; Kitszel, > Przemyslaw <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-next v2 3/3] ice: E825C PHY register > cleanup > > From: Karol Kolacinski <[email protected]> > > Minor PTP register refactor, including logical grouping E825C 1-step > timestamping registers. Remove unused register definitions > (PHY_REG_GPCS_BITSLIP, PHY_REG_REVISION). > Also, apply preferred GENMASK macro (instead of ICE_M) for register fields > definition affected by this patch. > > Reviewed-by: Simon Horman <[email protected]> > Reviewed-by: Przemek Kitszel <[email protected]> > Signed-off-by: Karol Kolacinski <[email protected]> > Signed-off-by: Grzegorz Nitka <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 31 ++++++++++----------- > 1 file changed, 14 insertions(+), 17 deletions(-) >
Tested-by: Rinitha S <[email protected]> (A Contingent worker at Intel)
