> -----Original Message----- > From: Nitka, Grzegorz <grzegorz.ni...@intel.com> > Sent: Tuesday, June 24, 2025 9:22 PM > To: intel-wired-...@lists.osuosl.org > Cc: net...@vger.kernel.org; Nguyen, Anthony L > <anthony.l.ngu...@intel.com>; Kitszel, Przemyslaw > <przemyslaw.kits...@intel.com>; Olech, Milena <milena.ol...@intel.com>; > Korba, Przemyslaw <przemyslaw.ko...@intel.com>; Nitka, Grzegorz > <grzegorz.ni...@intel.com> > Subject: [PATCH v2 iwl-net] ice: add recovery clock and clock 1588 control for > E825c > > From: Przemyslaw Korba <przemyslaw.ko...@intel.com> > > Add control for E825 input pins: phy clock recovery and clock 1588. > E825 does not provide control over platform level DPLL but it > provides control over PHY clock recovery, and PTP/timestamp driven > inputs for platform level DPLL. > > Introduce a software controlled layer of abstraction to: > - create a DPLL of type EEC for E825c, > - create recovered clock pin for each PF, and control them through > writing to registers, > - create pin to control clock 1588 for PF0, and control it through > writing to registers. > > Reviewed-by: Milena Olech <milena.ol...@intel.com> > Co-developed-by: Grzegorz Nitka <grzegorz.ni...@intel.com> > Signed-off-by: Grzegorz Nitka <grzegorz.ni...@intel.com> > Signed-off-by: Przemyslaw Korba <przemyslaw.ko...@intel.com>
I put wrong list in the title. It should go to 'net-next', not 'net'. Will fix it in another patch.
