On Mon, Sep 29, 2025 at 05:29:05PM +0200, Grzegorz Nitka wrote: > On dual complex E825, only complex 0 has functional CGU (Clock > Generation Unit), powering all the PHYs. > SBQ (Side Band Queue) destination device 'cgu' in current implementation > points to CGU on current complex and, in order to access primary CGU > from the secondary complex, the driver should use 'cgu_peer' as > a destination device in read/write CGU registers operations. > > Define new 'cgu_peer' (15) as RDA (Remote Device Access) client over > SB-IOSF interface and use it as device target when accessing CGU from > secondary complex. > > This problem has been identified when working on recovery clock > enablement [1]. In existing implementation for E825 devices, only PF0, > which is clock owner, is involved in CGU configuration, thus the > problem was not exposed to the user. > > [1] > https://patchwork.ozlabs.org/project/intel-wired-lan/patch/[email protected]/ > > Fixes: e2193f9f9ec9 ("ice: enable timesync operation on 2xNAC E825 devices") > Signed-off-by: Grzegorz Nitka <[email protected]> > Reviewed-by: Arkadiusz Kubalewski <[email protected]> > Reviewed-by: Aleksandr Loktionov <[email protected]> > --- > v1->v2: > - rebased > - fixed code style coomments (skipped redundant 'else', improved > 'Return' > description in function doc-string)
Reviewed-by: Simon Horman <[email protected]>
