> -----Original Message----- > From: Nitka, Grzegorz <[email protected]> > Sent: Thursday, December 18, 2025 10:44 AM > To: [email protected] > Cc: [email protected]; Nguyen, Anthony L > <[email protected]>; Kitszel, Przemyslaw > <[email protected]>; Nitka, Grzegorz > <[email protected]>; Loktionov, Aleksandr > <[email protected]> > Subject: [PATCH iwl-net] ice: fix 'adjust' timer programming for E830 > devices > > Fix incorrect 'adjust the timer' programming sequence for E830 devices > series. Only shadow registers GLTSYN_SHADJ were programmed in the > current implementation. According to the specification [1], write to > command GLTSYN_CMD register is also required with CMD field set to > "Adjust the Time" value, for the timer adjustment to take the effect. > > The flow was broken for the adjustment less than S32_MAX/MIN range > (around +/- 2 seconds). For bigger adjustment, non-atomic programming > flow is used, involving set timer programming. Non-atomic flow is > implemented correctly. > > Testing hints: > Run command: > phc_ctl /dev/ptpX get adj 2 get > Expected result: > Returned timstamps differ at least by 2 seconds > > [1] Intel® Ethernet Controller E830 Datasheet rev 1.3, chapter 9.7.5.4 > https://cdrdv2.intel.com/v1/dl/getContent/787353?explicitVersion=true > > Fixes: f00307522786 ("ice: Implement PTP support for E830 devices") > Reviewed-by: Aleksandr Loktionov <[email protected]> > Signed-off-by: Grzegorz Nitka <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > index 35680dbe4a7f..161a0ae8599c 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > @@ -5381,8 +5381,8 @@ int ice_ptp_write_incval_locked(struct ice_hw > *hw, u64 incval) > */ > int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) { > + int err = 0; > u8 tmr_idx; > - int err; > > tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; > > @@ -5399,8 +5399,8 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 > adj) > err = ice_ptp_prep_phy_adj_e810(hw, adj); > break; > case ICE_MAC_E830: > - /* E830 sync PHYs automatically after setting > GLTSYN_SHADJ */ > - return 0; > + /* E830 sync PHYs automatically after setting cmd > register */ > + break; > case ICE_MAC_GENERIC: > err = ice_ptp_prep_phy_adj_e82x(hw, adj); > break; > > base-commit: 8282ed7f73cf08f99288d3d0131e07f149063fbe > -- > 2.39.3
Reviewed-by: Aleksandr Loktionov <[email protected]>
