> -----Original Message-----
> From: Intel-wired-lan <[email protected]> On Behalf
> Of Vitaly Lifshits
> Sent: Tuesday, January 6, 2026 3:14 PM
> To: [email protected]
> Cc: Lifshits, Vitaly <[email protected]>
> Subject: [Intel-wired-lan] [PATCH iwl-net v4 2/2] e1000e: clear DPG_EN
> after reset to avoid autonomous power-gating
> 
> Panther Lake systems introduced an autonomous power gating feature for
> the integrated Gigabit Ethernet in shutdown state (S5) state. As part
> of
> it, the reset value of DPG_EN bit was changed to 1. Clear this bit
> after
> performing hardware reset to avoid errors such as Tx/Rx hangs, or
> packet
> loss/corruption.
> 
> Fixes: 0c9183ce61bc ("e1000e: Add support for the next LOM
> generation")
> Signed-off-by: Vitaly Lifshits <[email protected]>
> ---
> v4: fix commit message
> v3: rephrase a comment in the code
> v2: fix a typo in a macro
> v1: initial version
> ---
>  drivers/net/ethernet/intel/e1000e/ich8lan.c | 10 ++++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/net/ethernet/intel/e1000e/defines.h
> b/drivers/net/ethernet/intel/e1000e/defines.h
> index ba331899d186..d4a1041e456d 100644
> --- a/drivers/net/ethernet/intel/e1000e/defines.h
> +++ b/drivers/net/ethernet/intel/e1000e/defines.h
> @@ -33,6 +33,7 @@
> 
>  /* Extended Device Control */
>  #define E1000_CTRL_EXT_LPCD  0x00000004     /* LCD Power Cycle Done
> */
> +#define E1000_CTRL_EXT_DPG_EN        0x00000008 /* Dynamic Power Gating
> Enable */
>  #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable
> Pin 3 */
>  #define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
>  #define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from
> EEPROM */
> diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c
> b/drivers/net/ethernet/intel/e1000e/ich8lan.c
> index eead80bba6f4..13841daba399 100644
> --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
> +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
> @@ -4932,6 +4932,16 @@ static s32 e1000_reset_hw_ich8lan(struct
> e1000_hw *hw)
>       reg |= E1000_KABGTXD_BGSQLBIAS;
>       ew32(KABGTXD, reg);
> 
> +     /*
> +      * The hardware reset value of the DPG_EN bit is 1.
> +      * Clear DPG_EN to prevent unexpected autonomous power gating.
> +      */
> +     if (hw->mac.type >= e1000_pch_ptp) {
> +             reg = er32(CTRL_EXT);
> +             reg &= ~E1000_CTRL_EXT_DPG_EN;
> +             ew32(CTRL_EXT, reg);
> +     }
> +
>       return 0;
>  }
> 
> --
> 2.34.1

Reviewed-by: Aleksandr Loktionov <[email protected]>

Reply via email to