> -----Original Message-----
> From: Intel-wired-lan <[email protected]> On Behalf
> Of Grzegorz Nitka
> Sent: Friday, May 15, 2026 1:00 AM
> To: [email protected]
> Cc: Vecera, Ivan <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected]; Kitszel,
> Przemyslaw <[email protected]>; [email protected];
> [email protected]; [email protected]; Kubalewski,
> Arkadiusz <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; Nguyen, Anthony L
> <[email protected]>; [email protected]; [email protected]
> Subject: [Intel-wired-lan] [PATCH v9 net-next 1/8] dpll: add generic
> DPLL type
>
> Add DPLL_TYPE_GENERIC to represent DPLL devices which do not fit the
> existing PPS or EEC classes.
>
> The UAPI type is intentionally generic. During netdev discussion,
> maintainers pointed out that introducing identifiers tied to a
> specific placement or single design does not scale across ASICs and
> vendors.
> The role of a DPLL is already inferable from the spawning driver, bus
> device, and pin topology, without encoding additional purpose-specific
> taxonomy in the type name.
>
> Using a generic type keeps the UAPI extensible and avoids premature
> naming that may become incorrect as new hardware topologies are
> exposed through the DPLL subsystem.
>
> Expose the new type through UAPI and netlink specification as
> "generic".
>
> Signed-off-by: Grzegorz Nitka <[email protected]>
> ---
> Documentation/netlink/specs/dpll.yaml | 3 +++
> drivers/dpll/dpll_nl.c | 2 +-
> include/uapi/linux/dpll.h | 2 ++
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/netlink/specs/dpll.yaml
> b/Documentation/netlink/specs/dpll.yaml
> index 91a172617b3a..2bf83f6732ab 100644
> --- a/Documentation/netlink/specs/dpll.yaml
> +++ b/Documentation/netlink/specs/dpll.yaml
> @@ -138,6 +138,9 @@ definitions:
> -
> name: eec
> doc: dpll drives the Ethernet Equipment Clock
> + -
> + name: generic
> + doc: generic dpll type for devices outside PPS/EEC classes
> render-max: true
> -
> type: enum
> diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c index
> b1d9182c7802..ed3bbe9841ea 100644
> --- a/drivers/dpll/dpll_nl.c
> +++ b/drivers/dpll/dpll_nl.c
> @@ -37,7 +37,7 @@ const struct nla_policy
> dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = { static const
> struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {
> [DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },
> [DPLL_A_CLOCK_ID] = { .type = NLA_U64, },
> - [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
> + [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
> };
>
> /* DPLL_CMD_DEVICE_GET - do */
> diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h
> index cb363cccf2e2..55eaa82f5f98 100644
> --- a/include/uapi/linux/dpll.h
> +++ b/include/uapi/linux/dpll.h
> @@ -109,10 +109,12 @@ enum dpll_clock_quality_level {
> * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE
> attribute
> * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal
> * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock
> + * @DPLL_TYPE_GENERIC: generic dpll type for devices outside PPS/EEC
> + classes
> */
> enum dpll_type {
> DPLL_TYPE_PPS = 1,
> DPLL_TYPE_EEC,
> + DPLL_TYPE_GENERIC,
>
> /* private: */
> __DPLL_TYPE_MAX,
> --
> 2.39.3
Reviewed-by: Aleksandr Loktionov <[email protected]>
