> -----Original Message-----
> From: Intel-wired-lan <[email protected]> On Behalf
> Of Grzegorz Nitka
> Sent: Wednesday, May 20, 2026 11:46 AM
> To: [email protected]
> Cc: Vecera, Ivan <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected]; Kitszel,
> Przemyslaw <[email protected]>; [email protected];
> [email protected]; [email protected]; Kubalewski,
> Arkadiusz <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; Nguyen, Anthony L
> <[email protected]>; [email protected]; [email protected]
> Subject: [Intel-wired-lan] [PATCH v10 net-next 8/8] ice: implement
> E825 TX ref clock control and TXC hardware sync status
>
> Build on the previously introduced TXC DPLL framework and implement
> full TX reference clock control and hardware-backed synchronization
> status reporting for E825 devices.
>
> E825 firmware may accept or override TX reference clock requests based
> on device-wide routing constraints and link conditions. Because the
> final selection becomes visible only after a link-up event, the driver
> splits the observation into two complementary signals:
>
> - TXCLK pin state reflects the requested TX reference clock
> (pf->ptp.port.tx_clk_req). After a link-up, the value is
> reconciled
> against the SERDES reference selector by
> ice_txclk_update_and_notify(); if firmware or auto-negotiation
> selected a different clock, tx_clk_req is overwritten so that pin
> state converges to the actual hardware selection.
>
> - TXC DPLL lock status reflects hardware synchronization:
> * LOCKED when an external TX reference is in use
> * UNLOCKED when falling back to ENET/TXCO, or when a requested
> external reference has not (yet) been accepted by hardware.
>
> Userspace observing only pin state therefore sees user intent, while
> lock status is the authoritative indicator of whether the requested
> clock is actually selected and synchronizing. This matches the DPLL
> subsystem model where pin state describes topology and device lock
> status describes signal quality.
>
> TX reference selection topology:
> - External references (SYNCE, EREF0) are represented as TXCLK pins
> - The internal ENET/TXCO clock has no pin representation; when
> selected, all TXCLK pins are reported DISCONNECTED
>
> With this change, TX reference clocks on E825 devices can be reliably
> selected, observed via standard DPLL interfaces, and monitored for
> effective synchronization through TXC DPLL lock status.
>
> Reviewed-by: Arkadiusz Kubalewski <[email protected]>
> Signed-off-by: Grzegorz Nitka <[email protected]>
> ---
> drivers/net/ethernet/intel/ice/Makefile | 2 +-
> drivers/net/ethernet/intel/ice/ice.h | 12 +
> drivers/net/ethernet/intel/ice/ice_dpll.c | 172 ++++++++++-
> drivers/net/ethernet/intel/ice/ice_dpll.h | 30 +-
> drivers/net/ethernet/intel/ice/ice_ptp.c | 37 ++-
> drivers/net/ethernet/intel/ice/ice_ptp.h | 7 +
> drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 37 +++
> drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 10 +
> drivers/net/ethernet/intel/ice/ice_txclk.c | 320 ++++++++++++++++++++
> drivers/net/ethernet/intel/ice/ice_txclk.h | 40 +++
> 10 files changed, 647 insertions(+), 20 deletions(-) create mode
> 100644 drivers/net/ethernet/intel/ice/ice_txclk.c
> create mode 100644 drivers/net/ethernet/intel/ice/ice_txclk.h
>
> diff --git a/drivers/net/ethernet/intel/ice/Makefile
> b/drivers/net/ethernet/intel/ice/Makefile
> index 38db476ab2ec..95fd0c49800f 100644
> --- a/drivers/net/ethernet/intel/ice/Makefile
> +++ b/drivers/net/ethernet/intel/ice/Makefile
> @@ -54,7 +54,7 @@ ice-$(CONFIG_PCI_IOV) += \
> ice_vf_mbx.o \
> ice_vf_vsi_vlan_ops.o \
> ice_vf_lib.o
> -ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o
> ice_tspll.o ice_cpi.o
> +ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o
> +ice_tspll.o ice_cpi.o ice_txclk.o
> ice-$(CONFIG_DCB) += ice_dcb.o ice_dcb_nl.o ice_dcb_lib.o
> ice-$(CONFIG_RFS_ACCEL) += ice_arfs.o
> ice-$(CONFIG_XDP_SOCKETS) += ice_xsk.o
> diff --git a/drivers/net/ethernet/intel/ice/ice.h
> b/drivers/net/ethernet/intel/ice/ice.h
> index 725b130dd3a2..f72bb1aa4067 100644
> --- a/drivers/net/ethernet/intel/ice/ice.h
> +++ b/drivers/net/ethernet/intel/ice/ice.h
> @@ -1155,4 +1155,16 @@ static inline struct ice_hw
> *ice_get_primary_hw(struct ice_pf *pf)
> else
> return &pf->adapter->ctrl_pf->hw;
> }
...
>
> enum ice_ptp_tx_interrupt {
> @@ -236,6 +240,7 @@ struct ice_ptp_pin_desc {
> * @info: structure defining PTP hardware capabilities
> * @clock: pointer to registered PTP clock device
> * @tstamp_config: hardware timestamping configuration
> + * @tx_refclks: bitmaps table to store the information about TX
> + reference clocks
> * @reset_time: kernel time after clock stop on reset
> * @tx_hwtstamp_good: number of completed Tx timestamp requests
> * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped @@
> -261,6 +266,8 @@ struct ice_ptp {
> struct ptp_clock_info info;
> struct ptp_clock *clock;
> struct kernel_hwtstamp_config tstamp_config;
> +#define ICE_E825_MAX_PHYS 2
Duplicate #define ICE_E825_MAX_PHYS, previous one in patch 6/8 ice_type.h:
> + unsigned long tx_refclks[ICE_E825_MAX_PHYS][ICE_REF_CLK_MAX];
> u64 reset_time;
> u64 tx_hwtstamp_good;
> u32 tx_hwtstamp_skipped;
> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> index 24fb7a3e14d6..f7f82aef9f40 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> @@ -486,6 +486,43 @@ static int ice_read_phy_eth56g(struct ice_hw *hw,
> u8 port, u32 addr, u32 *val)
> return err;
> }
>
...
> /* _ICE_TXCLK_H_ */
> --
> 2.39.3
