> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of Petr > Oros > Sent: 05 May 2026 18:21 > To: [email protected] > Cc: Paul Menzel <[email protected]>; Kitszel, Przemyslaw > <[email protected]>; Eric Dumazet <[email protected]>; > Kubalewski, Arkadiusz <[email protected]>; Loktionov, Aleksandr > <[email protected]>; Andrew Lunn <[email protected]>; Nguyen, > Anthony L <[email protected]>; Simon Horman <[email protected]>; > [email protected]; Jakub Kicinski <[email protected]>; Paolo > Abeni <[email protected]>; David S. Miller <[email protected]>; > [email protected] > Subject: [Intel-wired-lan] [PATCH iwl-net v2] ice: fix missing priority > callbacks for U.FL DPLL pins > > The U.FL2 input pin advertises DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE > in its capability mask, but ice_dpll_pin_ufl_ops does not provide .prio_get > and .prio_set callbacks. As a result the DPLL subsystem cannot report or > accept priority for U.FL pins: pin-get omits the prio field on U.FL2 and > > pin-set with prio is rejected as invalid, even though the capability is > present. This prevents user space from using priority to select or disable > U.FL2 as a DPLL input source. > > Reproducer with iproute2 (dpll command): > > # dpll pin show board-label U.FL2 > pin id 16: > module-name ice > board-label U.FL2 > type ext > capabilities priority-can-change|state-can-change > parent-device: > id 0 direction input state selectable phase-offset 0 > /* note: no "prio" between "direction" and "state", > even though priority-can-change is advertised */ > > # dpll pin set id 16 parent-device 0 prio 5 > RTNETLINK answers: Operation not supported > > After the fix the prio field is reported by pin show and pin set with prio is > accepted on U.FL2. > > Add the missing .prio_get and .prio_set callbacks to ice_dpll_pin_ufl_ops, > reusing ice_dpll_sw_input_prio_{get,set}. The same ops struct is shared by > U.FL1 and U.FL2: U.FL2 (input) delegates to the backing hardware input pin, > while U.FL1 (output) does not advertise > DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE so the dpll core capability gate > never invokes prio_set for it, and prio_get reports the OUTPUT sentinel > (ICE_DPLL_PIN_PRIO_OUTPUT) on the output side exactly like the SMA path does > today. > > Fixes: 2dd5d03c77e2 ("ice: redesign dpll sma/u.fl pins control") > Reviewed-by: Aleksandr Loktionov <[email protected]> > Reviewed-by: Paul Menzel <[email protected]> > Signed-off-by: Petr Oros <[email protected]> > --- > v2: > - describe the userspace reproducer (dpll pin show / dpll pin set) > in the commit message, suggested by Paul Menzel > - collect Reviewed-by tags from v1 > > v1: https://lore.kernel.org/all/[email protected]/ > --- > drivers/net/ethernet/intel/ice/ice_dpll.c | 2 ++ > 1 file changed, 2 insertions(+) >
Tested-by: Rinitha S <[email protected]> (A Contingent worker at Intel)
