The TSYNCRXCTL read-modify-write in ixgbe_ptp_set_timestamp_mode() clears
only TSYNCRXCTL.EN and the TYPE field, never TSIP_UT_EN. On X550 and newer
that bit is set whenever an Rx filter is requested, and a later
HWTSTAMP_FILTER_NONE request takes an early break out of the X550/E610
switch arm, leaving the bit set in the register while clearing
IXGBE_FLAG_RX_HWTSTAMP_ENABLED. That flag is what gates trailer removal in
ixgbe_ptp_rx_pktstamp(), so frames keep the 8 byte timestamp trailer with
nothing trimming it, giving wrong skb lengths and rx_bytes. Only a MAC
reset clears the bit.
Add TSIP_UT_EN to the clear mask.
Discovered by code review of the Rx timestamping path while working on the
following patch, and confirmed by code inspection; not reproduced on
hardware and no kernel modification or error injection was involved.
Fixes: a9763f3cb54c ("ixgbe: Update PTP to support X550EM_x devices")
Signed-off-by: Przemyslaw Korba <[email protected]>
Reviewed-by: Milena Olech <[email protected]>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
index 6885d2343c48..8dc6a009b62c 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
@@ -1111,7 +1111,8 @@ static int ixgbe_ptp_set_timestamp_mode(struct
ixgbe_adapter *adapter,
/* enable/disable RX */
regval = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
- regval &= ~(IXGBE_TSYNCRXCTL_ENABLED | IXGBE_TSYNCRXCTL_TYPE_MASK);
+ regval &= ~(IXGBE_TSYNCRXCTL_ENABLED | IXGBE_TSYNCRXCTL_TYPE_MASK |
+ IXGBE_TSYNCRXCTL_TSIP_UT_EN);
regval |= tsync_rx_ctl;
IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, regval);
--
2.43.0
