* Stephen Warren wrote:
> On 04/12/2012 11:44 AM, Thierry Reding wrote:
[...]
> And given that, I don't think we should name the node after some
> OS-specific software concept. Device tree is intended to model hardware.
[...]
> > Maybe one solution would be to have a top-level DRM device with a register
> > map from 0x54000000 to 0x547fffff, which the TRM designates as "host
> > registers". Then subnodes could be used for the subdevices.
> 
> Ah yes, just what I was thinking above:-)

I came up with the following:

        /* host1x */
        host1x : host1x@50000000 {
                reg = <0x50000000 0x00024000>;
                interrupts = <0 64 0x04   /* cop syncpt */
                              0 65 0x04   /* mpcore syncpt */
                              0 66 0x04   /* cop general */
                              0 67 0x04>; /* mpcore general */
        };

        /* graphics host */
        graphics@54000000 {
                compatible = "nvidia,tegra20-graphics";

                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0x54000000 0x08000000>;

                host1x = <&host1x>;

                /* video-encoding/decoding */
                mpe@54040000 {
                        reg = <0x54040000 0x00040000>;
                        interrupts = <0 68 0x04>;
                };

                /* video input */
                vi@54080000 {
                        reg = <0x54080000 0x00040000>;
                        interrupts = <0 69 0x04>;
                };

                /* EPP */
                epp@540c0000 {
                        reg = <0x540c0000 0x00040000>;
                        interrupts = <0 70 0x04>;
                }

                /* ISP */
                isp@54100000 {
                        reg = <0x54100000 0x00040000>;
                        interrupts = <0 71 0x04>;
                };

                /* 2D engine */
                gr2d@54140000 {
                        reg = <0x54140000 0x00040000>;
                        interrupts = <0 72 0x04>;
                };

                /* 3D engine */
                gr3d@54180000 {
                        reg = <0x54180000 0x00040000>;
                };

                /* display controllers */
                disp1 : dc@54200000 {
                        compatible = "nvidia,tegra20-dc";
                        reg = <0x54200000 0x00040000>;
                        interrupts = <0 73 0x04>;
                };

                disp2 : dc@54240000 {
                        compatible = "nvidia,tegra20-dc";
                        reg = <0x54240000 0x00040000>;
                        interrupts = <0 74 0x04>;
                };

                /* outputs */
                lvds : rgb {
                        compatible = "nvidia,tegra20-rgb";
                };

                hdmi : hdmi@54280000 {
                        compatible = "nvidia,tegra20-hdmi";
                        reg = <0x54280000 0x00040000>;
                        interrupts = <0 75 0x04>;
                };

                tvo : tvo@542c0000 {
                        compatible = "nvidia,tegra20-tvo";
                        reg = <0x542c0000 0x00040000>;
                        interrupts = <0 76 0x04>;
                };

                dsi : dsi@54300000 {
                        compatible = "nvidia,tegra20-dsi";
                        reg = <0x54300000 0x00040000>;
                };

                display-controllers = <&disp1 &disp2>;
                outputs = <&lvds &hdmi &tvo &dsi>;

                /* initial configuration */
                configuration {
                        lvds {
                                display-controller = <&disp1>;
                                output = <&lvds>;
                        };

                        hdmi {
                                display-controller = <&disp2>;
                                output = <&hdmi>;
                        };
                };
        };

I added an additional node for the initial configuration so that the driver
knows which mapping to setup at boot. What I don't quite see yet is where to
attach EDID data or pass the phandle to the I2C controller for DDC/EDID
probing. The initial configuration is certainly not the right place. Perhaps
the outputs property should be made a node instead:

        outputs {
                lvds_out {
                        output = <&lvds>;
                        edid = <&edid>;
                };

                hdmi_out {
                        output = <&hdmi>;
                        ddc = <&i2c2>;
                };
        };

But then "outputs" should probably become something like "connectors"
instead and the initial configuration refers to the "_out" phandles.

Thierry

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