On 04/18 10:07, Kefeng Wang wrote:
> There is already S2CR_TYPE_TRANS in S2CR_TYPE_TRANS macro,
> so drop the second shift.

Typo issue, please use following patch.

> 
> Signed-off-by: Kefeng Wang <[email protected]>
> ---
>  drivers/iommu/arm-smmu.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 8b89e33..96755ec 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -1167,7 +1167,7 @@ static int arm_smmu_domain_add_master(struct 
> arm_smmu_domain *smmu_domain,
>       for (i = 0; i < master->num_streamids; ++i) {
>               u32 idx, s2cr;
>               idx = master->smrs ? master->smrs[i].idx : master->streamids[i];
> -             s2cr = (S2CR_TYPE_TRANS << S2CR_TYPE_SHIFT) |
> +             s2cr = S2CR_TYPE_TRANS |
>                      (smmu_domain->root_cfg.cbndx << S2CR_CBNDX_SHIFT);
>               writel_relaxed(s2cr, gr0_base + ARM_SMMU_GR0_S2CR(idx));
>       }
> 


>From bfcdbee6f5e71c561dfddf8751c4eabdca1e3a56 Mon Sep 17 00:00:00 2001
From: Kefeng Wang <[email protected]>
Date: Fri, 18 Apr 2014 10:20:48 +0800
Subject: [PATCH] iommu/arm-smmu: fix incorrect use of S2CR_TYPE_SHIFT

There is already S2CR_TYPE_SHIFT in S2CR_TYPE_TRANS macro,
so drop the second shift.

Signed-off-by: Kefeng Wang <[email protected]>
---
 drivers/iommu/arm-smmu.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 8b89e33..96755ec 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1167,7 +1167,7 @@ static int arm_smmu_domain_add_master(struct 
arm_smmu_domain *smmu_domain,
        for (i = 0; i < master->num_streamids; ++i) {
                u32 idx, s2cr;
                idx = master->smrs ? master->smrs[i].idx : master->streamids[i];
-               s2cr = (S2CR_TYPE_TRANS << S2CR_TYPE_SHIFT) |
+               s2cr = S2CR_TYPE_TRANS |
                       (smmu_domain->root_cfg.cbndx << S2CR_CBNDX_SHIFT);
                writel_relaxed(s2cr, gr0_base + ARM_SMMU_GR0_S2CR(idx));
        }
-- 
1.7.1


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