On 02/04/2015 09:15 AM, Joerg Roedel wrote:
On Mon, Feb 02, 2015 at 10:35:36AM -0700, Alex Williamson wrote:
[cc +joerg]

On Mon, 2015-02-02 at 11:01 -0500, Mark Hounschell wrote:
  From what I understand of CMA, and it seems provable to me, is that
dma_alloc_coherent allocates my 8MB buffer from CMA defined on the
cmdline. Without CMA specified on the cmdline, dma_alloc_coherent
definitely fails to allocate an 8MB contiguous buffer. From what I've
read about it, it is supposed to transparently "just work" when
dma_alloc_coherent is used?

Yes, if you're running with the software iotlb (aka. bounce buffers),
then dma_ops->alloc is x86_swiotlb_alloc_coherent(), which calls
dma_generic_alloc_coherent(), which attempts to use CMA via
dma_alloc_from_contiguous().

If you look at the same path with AMD-Vi, dma_ops->alloc is
amd_iommu.c:alloc_coherent(), which simply uses __get_free_pages() to
allocate the buffer.  I don't see any CMA integration along that path.
If you were using Intel VT-d, then the buffer is again allocated with
dma_alloc_from_contiguous() and should use CMA.  This was added in
kernel v3.16, but no corresponding AMD-Vi change was added.  Joerg, this
might be an easily fixed oversight.

Right, CMA is not yet integrated in the AMD IOMMU driver, nobody asked
fot it until now :) I will add that fall-back there for big allocations.


        Joerg



Hi Joerg,

Is device to device (crossing pci busses) or even pci-e to pci-e support there or in the future?

Thanks and Regards
Mark


_______________________________________________
iommu mailing list
[email protected]
https://lists.linuxfoundation.org/mailman/listinfo/iommu

Reply via email to