On Sun, 2015-04-26 at 11:33 -0600, Alex Williamson wrote:
> Curious why these weren't posted to the mailing list. 

Apologies for that. I was thinking of this tree as *only* collecting
the stuff for SVM, and had mostly forgotten the bug-fixes. I was going
to post the series once I had it all in better shape... and when it
became apparent that SVM wasn't going to make it for 4.1 I wasn't
actually going to push these early parts that *are* ready at all. But
then I started getting badgered about the X2APIC_OPT_OUT nonsense.

>  This one in particular not only ignores RMRR on IGD, but any PCI 
> class display device.  We may understand why IGD has RMRRs, but we 
> certainly don't understand enough to ignore RMRRs for other GPUs, 
> should they exist.

If they exist, they'll exist for precisely the same reason — to let
the graphics device continue to render its framebuffer after the IOMMU
is turned on.

For a discrete card with a discrete video BIOS, as opposed to chipset
-integrated stuff, I suspect it's actually much *less* likely that
there's any other weirdness going on.

-- 
David Woodhouse                            Open Source Technology Centre
[email protected]                              Intel Corporation

Attachment: smime.p7s
Description: S/MIME cryptographic signature

_______________________________________________
iommu mailing list
[email protected]
https://lists.linuxfoundation.org/mailman/listinfo/iommu

Reply via email to