On Mon, 2015-08-17 at 17:04 +0300, Andy Shevchenko wrote: > There is already helper functions to do 64-bit I/O on 32-bit machines > or buses, > thus we don't need to reinvent the wheel. >
Any comment on this one? > Signed-off-by: Andy Shevchenko <[email protected]> > --- > include/linux/intel-iommu.h | 19 +++++-------------- > 1 file changed, 5 insertions(+), 14 deletions(-) > > diff --git a/include/linux/intel-iommu.h b/include/linux/intel > -iommu.h > index a868a0f..5439ea4 100644 > --- a/include/linux/intel-iommu.h > +++ b/include/linux/intel-iommu.h > @@ -26,6 +26,8 @@ > #include <linux/iova.h> > #include <linux/io.h> > #include <linux/dma_remapping.h> > + > +#include <asm-generic/io-64-nonatomic-lo-hi.h> > #include <asm/cacheflush.h> > #include <asm/iommu.h> > > @@ -59,26 +61,15 @@ > #define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr > register */ > > #define OFFSET_STRIDE (9) > -/* > -#define dmar_readl(dmar, reg) readl(dmar + reg) > -#define dmar_readq(dmar, reg) ({ \ > - u32 lo, hi; \ > - lo = readl(dmar + reg); \ > - hi = readl(dmar + reg + 4); \ > - (((u64) hi) << 32) + lo; }) > -*/ > + > static inline u64 dmar_readq(void __iomem *addr) > { > - u32 lo, hi; > - lo = readl(addr); > - hi = readl(addr + 4); > - return (((u64) hi) << 32) + lo; > + return lo_hi_readq(addr); > } > > static inline void dmar_writeq(void __iomem *addr, u64 val) > { > - writel((u32)val, addr); > - writel((u32)(val >> 32), addr + 4); > + lo_hi_writeq(val, addr); > } > > #define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4) -- Andy Shevchenko <[email protected]> Intel Finland Oy _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
