On Mon, 2016-09-19 at 14:18 +0200, Joerg Roedel wrote: > [Cc'ing David] > > On Mon, Sep 12, 2016 at 10:49:11AM +0800, Xunlei Pang wrote: > > > > According to the vt-d spec, the size of pasid (state) entry is 8B > > which equals 3 in power of 2, the number of pasid (state) entries > > is (ecap_pss + 1) in power of 2. > > > > Thus the right size of pasid (state) table in power of 2 should be > > ecap_pss(iommu->ecap) plus "1+3=4" other than 7. > > > > Signed-off-by: Xunlei Pang <xlp...@redhat.com> > > --- > > drivers/iommu/intel-svm.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c > > index 8ebb353..cfa75c2 100644 > > --- a/drivers/iommu/intel-svm.c > > +++ b/drivers/iommu/intel-svm.c > > @@ -39,7 +39,7 @@ int intel_svm_alloc_pasid_tables(struct intel_iommu > > *iommu) > > struct page *pages; > > int order; > > > > - order = ecap_pss(iommu->ecap) + 7 - PAGE_SHIFT; > > + order = ecap_pss(iommu->ecap) + 4 - PAGE_SHIFT; > > if (order < 0) > > order = 0; > > The patch seems to be correct, but I'll let David comment on it first.
Yes, that looks correct. I think we may also need to limit it, because full 20-bit PASID support means we'll attempt an order 11 allocation. But that's certainly correct for now Acked-by: David Woodhouse <dw...@infradead.org> -- dwmw2
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