On Thu, Feb 16, 2017 at 09:42:54AM -0600, Tom Lendacky wrote:
> When System Memory Encryption (SME) is enabled, the physical address
> space is reduced. Adjust the x86_phys_bits value to reflect this
> reduction.
>
> Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
> ---
> arch/x86/kernel/cpu/common.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index b33bc06..358208d7 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -771,11 +771,15 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
> u64 msr;
>
> /*
> - * For SME, BIOS support is required. If BIOS has not
> - * enabled SME don't advertise the feature.
> + * For SME, BIOS support is required. If BIOS has
> + * enabled SME adjust x86_phys_bits by the SME
> + * physical address space reduction value. If BIOS
> + * has not enabled SME don't advertise the feature.
> */
> rdmsrl(MSR_K8_SYSCFG, msr);
> - if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
> + if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT)
> + c->x86_phys_bits -= (ebx >> 6) & 0x3f;
> + else
> eax &= ~0x01;
Right, as I mentioned yesterday, this should go to arch/x86/kernel/cpu/amd.c
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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