On 25/09/17 16:14, Raj, Ashok wrote:
> On Mon, Sep 25, 2017 at 12:45:00PM +0100, Jean-Philippe Brucker wrote:
> [snip]
> 
>> This format tells how the guest organizes its PASID tables. Depending on
>> 'format', the PASID table can be:
>> * A flat array of descriptors
>> * One array of 1st-level descriptors pointing to a 2nd level of
>> descriptors. When translating an access, the SMMU splits the PASID at bit
>> 6, uses the upper half to get the 1st level descriptor and the lower half
>> to get the 2nd level one (4k leaf table).
>> * The same format, but instead split at PASID bit 10 (64k leaf table)
> 
> When in multilevel PASID table, do you shadow it in the host? or every 
> level is all hosted in guest space? in Intel vt-d, when context is in 
> a nested mode, PASID table is a gPA. Its a single level table.

In the SMMU as well, both levels of PASID tables are accessed by gPA, so
there's no need to shadow them.

Thanks,
Jean

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