On Wed, 11 Jul 2018, Christoph Hellwig wrote:

> >  SiByte should too though, at least for those boards, such as the SWARM 
> > and the BigSur, that can have DRAM over 4GiB (and 32-bit PCI devices 
> > plugged).
> 
> Only in this case refers to loonson boards.

 Right!

> >  I never got to have the wiring of swiotlb completed for these boards as 
> > I got distracted with getting set up to debug a DRAM controller issue 
> > observed in the form of memory data corruption with the banks fully 
> > populated (which might have to do something with the parameters of bank 
> > interleaving enabled in such a configuration, as replacing a single 
> > module with a smaller-sized one and therefore disabling interleaving, 
> > which can only work with all modules being the same size, makes the 
> > problem go away).
> 
> After this series enabling swiotlb for another board is trivial as all
> the code has been consolidated.  Just select SWIOTLB and add a call to
> swiotlb_init to the board setup code.

 I had that feeling too, thanks for confirming.  And for doing this work 
in the first place!

  Maciej
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