[PATCH 6/7] irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg

[Julien Grall]

The functions mbi_compose_m{b, s}i_msg may be called from non-preemptible
context. However, on RT, iommu_dma_map_msi_msg requires to be called
from a preemptible context.

A recent patch split the function iommu_dma_map_msi_msg in 2 functions:
one that should be called in preemptible context, the other does
not have any requirement.

This patch reworks the GICv3 MBI driver to avoid executing preemptible
code in non-preemptible context by preparing the MSI mappings when
allocating the MSI interrupt.

Signed-off-by: Julien Grall <julien.gr...@arm.com>
---
 drivers/irqchip/irq-gic-v3-mbi.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c
index fbfa7ff6deb1..c812b80e3ce9 100644
--- a/drivers/irqchip/irq-gic-v3-mbi.c
+++ b/drivers/irqchip/irq-gic-v3-mbi.c
@@ -84,6 +84,7 @@ static void mbi_free_msi(struct mbi_range *mbi, unsigned int 
hwirq,
 static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
                                   unsigned int nr_irqs, void *args)
 {
+       msi_alloc_info_t *info = args;
        struct mbi_range *mbi = NULL;
        int hwirq, offset, i, err = 0;
 
@@ -104,6 +105,16 @@ static int mbi_irq_domain_alloc(struct irq_domain *domain, 
unsigned int virq,
 
        hwirq = mbi->spi_start + offset;
 
+       err = iommu_dma_prepare_msi(info->desc,
+                                   mbi_phys_base + GICD_CLRSPI_NSR);
+       if (err)
+               return err;
+
+       err = iommu_dma_prepare_msi(info->desc,
+                                   mbi_phys_base + GICD_SETSPI_NSR);
+       if (err)
+               return err;
+
        for (i = 0; i < nr_irqs; i++) {
                err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i);
                if (err)
@@ -142,7 +153,7 @@ static void mbi_compose_msi_msg(struct irq_data *data, 
struct msi_msg *msg)
        msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
        msg[0].data = data->parent_data->hwirq;
 
-       iommu_dma_map_msi_msg(data->irq, msg);
+       iommu_dma_compose_msi_msg(data->irq, msg);
 }
 
 #ifdef CONFIG_PCI_MSI
@@ -202,7 +213,7 @@ static void mbi_compose_mbi_msg(struct irq_data *data, 
struct msi_msg *msg)
        msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR);
        msg[1].data = data->parent_data->hwirq;
 
-       iommu_dma_map_msi_msg(data->irq, &msg[1]);
+       iommu_dma_compose_msi_msg(data->irq, &msg[1]);
 }
 
 /* Platform-MSI specific irqchip */
-- 
2.11.0

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