Hi Suravee, On Tue, Jul 16, 2019 at 04:29:16AM +0000, Suthikulpanit, Suravee wrote: > AMD IOMMU requires IntCapXT registers to be setup in order to generate > its own interrupts (for Event Log, PPR Log, and GA Log) with 32-bit > APIC destination ID. Without this support, AMD IOMMU MSI interrupts > will not be routed correctly when booting the system in X2APIC mode. > > Cc: Joerg Roedel <j...@8bytes.org> > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
Patch looks good to me, just a Fixes tag is missing. Can you send me one? I will queue the patch up for v5.3 then. Regards, Joerg _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu