On 19/10/2019 00:31, Krishna Reddy wrote:
Add binding for NVIDIA's Tegra194 Soc SMMU that is based
on ARM MMU-500.
Signed-off-by: Krishna Reddy <[email protected]>
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 4 ++++
Rob (+cc) is in the process of converting the SMMU bindings to schema,
so we might need a bit of coordination here...
Robin.
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 3133f3b..1d72fac 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -31,6 +31,10 @@ conditions.
as below, SoC-specific compatibles:
"qcom,sdm845-smmu-500", "arm,mmu-500"
+ NVIDIA SoCs that use more than one ARM MMU-500 together
+ needs following SoC-specific compatibles along with
"arm,mmu-500":
+ "nvidia,tegra194-smmu"
+
- reg : Base address and size of the SMMU.
- #global-interrupts : The number of global interrupts exposed by the
