On Fri, Sep 11, 2020 at 12:16:42AM -0700, Nicolin Chen wrote: > IOVA might not be always 4KB aligned. So tegra_smmu_iova_to_phys > function needs to add on the lower 12-bit offset from input iova. > > Signed-off-by: Nicolin Chen <nicoleots...@gmail.com> > --- > drivers/iommu/tegra-smmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c > index 789d21c01b77..50b962b0647e 100644 > --- a/drivers/iommu/tegra-smmu.c > +++ b/drivers/iommu/tegra-smmu.c > @@ -795,7 +795,7 @@ static phys_addr_t tegra_smmu_iova_to_phys(struct > iommu_domain *domain, > > pfn = *pte & as->smmu->pfn_mask; > > - return SMMU_PFN_PHYS(pfn); > + return SMMU_PFN_PHYS(pfn) + SMMU_OFFSET_IN_PAGE(iova); > } > > static struct tegra_smmu *tegra_smmu_find(struct device_node *np)
Acked-by: Thierry Reding <tred...@nvidia.com>
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