IORT revision E contains a few additions like,
-Added an identifier field in the node descriptors to aid table
cross-referencing.
-Introduced the Reserved Memory Range(RMR) node. This is used
to describe memory ranges that are used by endpoints and requires
a unity mapping in SMMU.
-Introduced a flag in the RC node to express support for PRI.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
-This should be updated through acpica git. I have sent out a pull
request for the same here,
https://github.com/acpica/acpica/pull/638
Please help to review.
---
include/acpi/actbl2.h | 25 +++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index ec66779cb193..274fce7b5c01 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -68,7 +68,7 @@
* IORT - IO Remapping Table
*
* Conforms to "IO Remapping Table System Software on ARM Platforms",
- * Document number: ARM DEN 0049D, March 2018
+ * Document number: ARM DEN 0049E, June 2020
*
******************************************************************************/
@@ -86,7 +86,8 @@ struct acpi_iort_node {
u8 type;
u16 length;
u8 revision;
- u32 reserved;
+ u16 reserved;
+ u16 identifier;
u32 mapping_count;
u32 mapping_offset;
char node_data[1];
@@ -100,7 +101,8 @@ enum acpi_iort_node_type {
ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
ACPI_IORT_NODE_SMMU = 0x03,
ACPI_IORT_NODE_SMMU_V3 = 0x04,
- ACPI_IORT_NODE_PMCG = 0x05
+ ACPI_IORT_NODE_PMCG = 0x05,
+ ACPI_IORT_NODE_RMR = 0x06,
};
struct acpi_iort_id_mapping {
@@ -167,10 +169,10 @@ struct acpi_iort_root_complex {
u8 reserved[3]; /* Reserved, must be zero */
};
-/* Values for ats_attribute field above */
+/* Masks for ats_attribute field above */
-#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex
supports ATS */
-#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex
doesn't support ATS */
+#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex supports
ATS */
+#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex supports
PRI */
struct acpi_iort_smmu {
u64 base_address; /* SMMU base address */
@@ -241,6 +243,17 @@ struct acpi_iort_pmcg {
u64 page1_base_address;
};
+struct acpi_iort_rmr {
+ u32 rmr_count;
+ u32 rmr_offset;
+};
+
+struct acpi_iort_rmr_desc {
+ u64 base_address;
+ u64 length;
+ u32 reserved;
+};
+
/*******************************************************************************
*
* IVRS - I/O Virtualization Reporting Structure
--
2.17.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
