Quoting Lu Baolu (2020-11-20 10:17:12) > Lu Baolu (3): > iommu: Add quirk for Intel graphic devices in map_sg > iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev > iommu/vt-d: Cleanup after converting to dma-iommu ops > > Tom Murphy (4): > iommu: Handle freelists when using deferred flushing in iommu drivers > iommu: Add iommu_dma_free_cpu_cached_iovas() > iommu: Allow the dma-iommu api to use bounce buffers > iommu/vt-d: Convert intel iommu driver to the iommu ops
Something that may be of interest is that we encounter problems with using intel-iommu across a PCI remove event. All HW generations fail with faults like: DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 4b822000 [fault reason 02] Present bit in context entry is clear i.e. they all report missing present bit after re-adding the device to the iommu group. Forcing an identity map (or disabling iommu) works fine. I applied this series just on the off-chance it changed the symptoms; it does not. If you have any ideas on how to chase down this fault, that would be very useful. We have a few other DMAR faults visible on many platforms, all "[fault reason 07] Next page table ptr is invalid" that are again not affected by this series, that we also need to resolve. -Chris _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
