Hi Jason, On Wed, 31 Mar 2021 15:33:24 -0300, Jason Gunthorpe <j...@nvidia.com> wrote:
> On Wed, Mar 31, 2021 at 11:20:30AM -0700, Jacob Pan wrote: > > Hi Jason, > > > > On Wed, 31 Mar 2021 14:31:48 -0300, Jason Gunthorpe <j...@nvidia.com> > > wrote: > > > > > We should try to avoid hidden behind the scenes kernel > > > > > interconnections between subsystems. > > > > > > [...] > [...] > > yes, this is done in this patchset. > > > [...] > > Just to clarify, you are saying (when FREE happens before proper > > teardown) there is no need to proactively notify all users of the > > IOASID to drop their reference. Instead, just wait for the other > > parties to naturally close and drop their references. Am I > > understanding you correctly? > > Yes. What are receivers going to do when you notify them anyhow? What > will a mdev do? This is how you get into they crazy locking problems. > The receivers perform cleanup work similar to normal unbind. Drain/Abort PASID. Locking is an issue in that the atomic notifier is under IOASID spinlock, so I provided a common ordered workqueue to let mdev drivers queue cleanup work that cannot be done in atomic context. Not ideal. Also need to prevent nested notifications for certain cases. > It is an error for userspace to shutdown like this, recover sensibly > and don't crash the kernel. PCIe error TLPs are expected, supress > them. That is what we decided on the mmu notifier discussion. > > > I feel having the notifications can add two values: > > 1. Shorten the duration of errors (as you mentioned below), FD close can > > take a long and unpredictable time. e.g. FD shared. > > Only if userspace exits in some uncontrolled way. In a controlled exit > it can close all the FDs in the right order. > > It is OK if userspace does something weird and ends up with disabled > IOASIDs. It shouldn't do that if it cares. > Agreed. > > 2. Provide teardown ordering among PASID users. i.e. vCPU, IOMMU, mdev. > > > > This is a hard ask too, there is no natural ordering here I can see, > obviously we want vcpu, mdev, iommu for qemu but that doesn't seem to > fall out unless we explicitly hard wire it into the kernel. > The ordering problem as I understood is that it is difficult for KVM to rendezvous all vCPUs before updating PASID translation table. So there could be in-flight enqcmd with the stale PASID after the PASID table update and refcount drop. If KVM is the last one to drop the PASID refcount, the PASID could be immediately reused and starts a new life. The in-flight enqcmd with the stale PASID could cause problems. The likelihood and window is very small. If we ensure KVM does PASID table update before IOMMU and mdev driver, the stale PASID in the in-flight enqcmd would be be drained before starting a new life. Perhaps Yi and Kevin can explain this better. > Doesn't kvm always kill the vCPU first based on the mmu notifier > shooting down all the memory? IIRC this happens before FD close? > I don't know the answer, Kevin & Yi? > > > The duration between unmapping the ioasid and releasing all HW access > > > will have HW see PCIE TLP errors due to the blocked access. If > > > userspace messes up the order it is fine to cause this. We already had > > > this dicussion when talking about how to deal with process exit in the > > > simple SVA case. > > Yes, we have disabled fault reporting during this period. The slight > > differences vs. the simple SVA case is that KVM is also involved and > > there might be an ordering requirement to stop vCPU first. > > KVM can continue to use the PASIDs, they are parked and DMA is > permanently blocked. When KVM reaches a natural point in its teardown > it can release them. > > If you have to stop the vcpu from a iommu notifier you are in the > crazy locking world I mentioned. IMHO don't create exciting locking > problems just to avoid PCI errors in uncontrolled shutdown. > > Suppress the errors instead. > I agree, this simplify things a lot. Just need to clarify the in-flight enqcmd case. > Jason Thanks, Jacob _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
