> From: Jason Gunthorpe <j...@nvidia.com> > Sent: Thursday, June 3, 2021 12:17 AM > [...] > > > If there are no hypervisor traps (does this exist?) then there is no > > > way to involve the hypervisor here and the child IOASID should simply > > > be a pointer to the guest's data structure that describes binding. In > > > this case that IOASID should claim all PASIDs when bound to a > > > RID. > > > > And in that case I think we should call that object something other > > than an IOASID, since it represents multiple address spaces. > > Maybe.. It is certainly a special case. > > We can still consider it a single "address space" from the IOMMU > perspective. What has happened is that the address table is not just a > 64 bit IOVA, but an extended ~80 bit IOVA formed by "PASID, IOVA".
More accurately 64+20=84 bit IOVA 😊 > > If we are already going in the direction of having the IOASID specify > the page table format and other details, specifying that the page I'm leaning toward this direction now, after a discussion with Baolu. He reminded me that a default domain is already created for each device when it's probed by the iommu driver. So it looks workable to expose a per-device capability query uAPI to user once a device is bound to the ioasid fd. Once it's available, the user should be able to judge what format/mode should be set when creating an IOASID. > tabnle format is the 80 bit "PASID, IOVA" format is a fairly small > step. In concept this view is true. But when designing the uAPI possibly we will not call it a 84bit format as the PASID table itself just serves 20bit PASID space. Will think more how to mark it in the next version. > > I wouldn't twist things into knots to create a difference, but if it > is easy to do it wouldn't hurt either. > Thanks Kevin _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
