On Sun, Sep 19, 2021 at 02:38:45PM +0800, Liu Yi L wrote:
> [HACK. will fix in v2]
>
> IOVA range is critical info for userspace to manage DMA for an I/O address
> space. This patch reports the valid iova range info of a given device.
>
> Due to aforementioned hack, this info comes from the hacked vfio type1
> driver. To follow the same format in vfio, we also introduce a cap chain
> format in IOMMU_DEVICE_GET_INFO to carry the iova range info.
[...]
> diff --git a/include/uapi/linux/iommu.h b/include/uapi/linux/iommu.h
> index 49731be71213..f408ad3c8ade 100644
> --- a/include/uapi/linux/iommu.h
> +++ b/include/uapi/linux/iommu.h
> @@ -68,6 +68,7 @@
> * +---------------+------------+
> * ...
> * @addr_width: the address width of supported I/O address spaces.
> + * @cap_offset: Offset within info struct of first cap
> *
> * Availability: after device is bound to iommufd
> */
> @@ -77,9 +78,11 @@ struct iommu_device_info {
> #define IOMMU_DEVICE_INFO_ENFORCE_SNOOP (1 << 0) /* IOMMU enforced
> snoop */
> #define IOMMU_DEVICE_INFO_PGSIZES (1 << 1) /* supported page sizes */
> #define IOMMU_DEVICE_INFO_ADDR_WIDTH (1 << 2) /* addr_wdith field valid */
> +#define IOMMU_DEVICE_INFO_CAPS (1 << 3) /* info supports cap
> chain */
> __u64 dev_cookie;
> __u64 pgsize_bitmap;
> __u32 addr_width;
> + __u32 cap_offset;
We can also add vendor-specific page table and PASID table properties as
capabilities, otherwise we'll need giant unions in the iommu_device_info
struct. That made me wonder whether pgsize and addr_width should also be
separate capabilities for consistency, but this way might be good enough.
There won't be many more generic capabilities. I have "output address
width" and "PASID width", the rest is specific to Arm and SMMU table
formats.
Thanks,
Jean
> };
>
> #define IOMMU_DEVICE_GET_INFO _IO(IOMMU_TYPE, IOMMU_BASE + 1)
> --
> 2.25.1
>
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