Hi folks, This includes several tunings of Intel SVA implementation. I plan to target them for v5.19. Please help to review.
Best regards, baolu Lu Baolu (3): iommu/vt-d: Set PGSNP bit in pasid table entry for sva binding iommu/vt-d: Drop stop marker messages iommu/vt-d: Size Page Request Queue to avoid overflow condition include/linux/intel-svm.h | 2 +- drivers/iommu/intel/pasid.c | 2 +- drivers/iommu/intel/svm.c | 5 +++++ 3 files changed, 7 insertions(+), 2 deletions(-) -- 2.25.1 _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
