Here is another one without shifting an offset.

27.07.2012, 19:36, "Anton D. Kachalov" <[email protected]>:
> Kieran,
>
> regarding to "igb" driver, offset (in words) to EEPROM's MAC should be placed 
> at 0x37 (in words) of EEPROM (page 178, table 6-1). It is 0xffff.
>
> Try the attached patch.
>
> I accidentally has added left shift by 2 instead of 1 :))
>
>>>    if ( ( rc = nvs_read ( &intel->eeprom, 0x37 << 2 /* NVM_ALT_MAC_ADDR_PTR 
>>> */,
>>>
>>>    to this one:
>>>
>>>    if ( ( rc = nvs_read ( &intel->eeprom, 0x37 << 1 /* NVM_ALT_MAC_ADDR_PTR 
>>> */,
>
> 27.07.2012, 19:01, "Kieran Evans" <[email protected]>:
>
>>   Anton, no luck there I'm afraid.
>>
>>   http://dbyz.co.uk/ipxe4.png
>>
>>   If you check the EEPROM dumps I sent earlier, you'll see that there is
>>   only one MAC in the whole EEPROM. Looking for it at different offsets
>>   will return garbage.
>>
>>   Just to be sure, I dumped the EEPROM from both interfaces (both linked
>>   in an earlier email) and they are identical, so they are sharing the
>>   same EEPROM.
>>
>>   /Kieran
>>
>>   On 27/07/2012 14:55, Anton D. Kachalov wrote:
>>>    Kieran,
>>>
>>>    my fault.
>>>
>>>    Fix this line:
>>>
>>>    if ( ( rc = nvs_read ( &intel->eeprom, 0x37 /* NVM_ALT_MAC_ADDR_PTR */,
>>>
>>>    to this one:
>>>
>>>    if ( ( rc = nvs_read ( &intel->eeprom, 0x37 << 2 /* NVM_ALT_MAC_ADDR_PTR 
>>> */,
> --
> Anton D. Kachalov
>
> ITO, R&D group, Senior System Engineer
> Tel: +7 (495) 739-70-00 ext.7613
> _______________________________________________
> ipxe-devel mailing list
> [email protected]
> https://lists.ipxe.org/mailman/listinfo.cgi/ipxe-devel

-- 
Anton D. Kachalov

ITO, R&amp;D group, Senior System Engineer
Tel: +7 (495) 739-70-00 ext.7613
--- intel.c.orig	2012-07-10 16:54:27.000000000 +0400
+++ intel.c	2012-07-27 19:32:48.496535892 +0400
@@ -181,22 +181,35 @@ static int intel_init_eeprom ( struct in
 static int intel_fetch_mac_eeprom ( struct intel_nic *intel,
 				    uint8_t *hw_addr ) {
 	int rc;
+	uint16_t offset;
 
 	/* Initialise EEPROM */
 	if ( ( rc = intel_init_eeprom ( intel ) ) != 0 )
 		return rc;
 
+        if ( ( rc = nvs_read ( &intel->eeprom, 0x37 /* NVM_ALT_MAC_ADDR_PTR */,
+                               &offset, sizeof(offset) ) ) != 0 ) {
+                DBGC ( intel, "INTEL %p could not read EEPROM alternate MAC"
+                       "address PTR: %s\n", intel, strerror ( rc ) );
+                return rc;
+        }
+
+        if (offset == 0xffff) {
+                /* There is no Alternate MAC Address */
+                return rc;
+        }
+
+        if (intel->port == 1)
+                offset += 3; /* E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 */
+
 	/* Read base MAC address from EEPROM */
-	if ( ( rc = nvs_read ( &intel->eeprom, INTEL_EEPROM_MAC,
+	if ( ( rc = nvs_read ( &intel->eeprom, offset,
 			       hw_addr, ETH_ALEN ) ) != 0 ) {
 		DBGC ( intel, "INTEL %p could not read EEPROM base MAC "
 		       "address: %s\n", intel, strerror ( rc ) );
 		return rc;
 	}
 
-	/* Adjust MAC address for multi-port devices */
-	hw_addr[ETH_ALEN-1] ^= intel->port;
-
 	DBGC ( intel, "INTEL %p has EEPROM MAC address %s (port %d)\n",
 	       intel, eth_ntoa ( hw_addr ), intel->port );
 	return 0;
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