While trying iPXE on an ARM64 machine (AMD's Seattle), where DRAM resides above
4GB, I ran into a truncation bug that was caused by dma_addr_t being defined
as u32. This patch changes it to the "more" architecural neutral unsigned long
so that it works for 64-bit machines where memory can reside above 4GB. This
patch is consistent with dma_addr_t definitions in other places such as bnx2,
igbvf, etherfabric, etc.
Signed-off-by: Leendert van Doorn <leend...@paramecium.org>
diff --git a/src/drivers/net/tg3/tg3.c b/src/drivers/net/tg3/tg3.c
index 42bfa2d..824c9b1 100644
--- a/src/drivers/net/tg3/tg3.c
+++ b/src/drivers/net/tg3/tg3.c
@@ -545,7 +545,7 @@ static int tg3_test_dma(struct tg3 *tp)
goto out_nofree;
}
buf_dma = virt_to_bus(buf);
- DBGC2(tp->dev, "dma test buffer, virt: %p phys: %#08x\n", buf, buf_dma);
+ DBGC2(tp->dev, "dma test buffer, virt: %p phys: %#016lx\n", buf,
buf_dma);
if (tg3_flag(tp, 57765_PLUS)) {
tp->dma_rwctrl = DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
diff --git a/src/drivers/net/tg3/tg3.h b/src/drivers/net/tg3/tg3.h
index 0c3d23b..be02c57 100644
--- a/src/drivers/net/tg3/tg3.h
+++ b/src/drivers/net/tg3/tg3.h
@@ -2788,7 +2788,7 @@ struct tg3_hw_stats {
u8 __reserved4[0xb00-0x9c8];
};
-typedef u32 dma_addr_t;
+typedef unsigned long dma_addr_t;
/* 'mapping' is superfluous as the chip does not write into
* the tx/rx post rings so we could just fetch it from there.
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